Logic Gates Questions and Answers

Answer: C

Correct answer: Carry-save-adder

A carry-save adder reduces three numbers to two - a partial sum and a carry vector - without propagating carries, so several numbers can be added at once and the carries resolved only at the final step. The other adders take two operands at a time.

Answer: A

Correct answer: Whenever a 0 is present at an input

NAND is the complement of AND. AND is 0 as soon as any input is 0, so NAND is 1 in that case, and it is 0 only when every input is 1.

Answer: C

Correct answer: a Johnson shift counter

A Johnson counter is a shift register whose inverted output is fed back to its input, so it cycles through a fixed sequence of states and each of its stages produces a repetitive waveform, offset in phase from the others. A single gate produces no sequence at all.

Answer: A

Correct answer: combinational logic circuits

A parallel adder's outputs depend only on the bits currently present at its inputs - it holds no state and needs no clock, which is the definition of a combinational circuit. Sequential circuits are those whose output depends also on what has gone before.

Answer: C

Y=A+B. This is the equation of OR gate. We require 3 NAND gates to create  OR gate.  We can also write

After 1st NAND operation
Y = (A AND B)' 
Y=  A'  + B'  (Demorgan's Law)
After 2nd NAND operation
Y= ( A'  + B')'
Y=  A . B  (Demorgan's Law)
After 3rd  NAND operation
Y= ( A . B )'
Y=  A' +  B '  (Demorgan's Law)

So we need 3 NAND gates.

Answer: C

Correct answer: DIP and SOIC configurations

CMOS parts are supplied in both packages: the through-hole dual in-line package and the surface-mount small-outline package, which holds the same circuit in far less board area.

Answer: B

Correct answer: False

NOR is the complement of OR, so the two produce opposite outputs for every input combination - the opposite of operating in the same way.

Answer: A

Correct answer: basic gates, a clock oscillator, and a repetitive waveform generator

The minimum set is a clock to provide timing, a repetitive waveform generator such as a counter to divide that clock into a sequence, and basic gates to decode the sequence into the particular waveform wanted. The option adding a Johnson counter as well goes beyond the minimum, which is what the question asks for.

Answer: D

Correct answer: all four inputs

AND requires every input to be HIGH; a single LOW input forces the output LOW however many other inputs are HIGH.

Answer: B

Correct answer: inversion

NOT is the complement operator, written with a prime or an overbar; it turns 1 into 0 and 0 into 1.