8085 Instruction Set Questions and Answers

Answer: D

RAL rotates the accumulator one bit to the left through the carry flag: the most significant bit goes into CY, and the old CY goes into bit 0.

\[ \text{AAH} = 1010\ 1010,\quad CY = 0 \]

After the first RAL: the accumulator is \(0101\ 0100 = 54\text{H}\) and CY = 1.

After the second RAL: the accumulator is \(1010\ 1001 = \text{A9H}\) and CY = 0.

The value AAH would result from rotating by 8 positions through the carry, 9AH and 99H come from wrong rotations. The answer is A9H, option D.

Answer: B

In the 8085, the instruction LDA 2600H loads the accumulator with the contents of the memory location whose 16 bit address, 2600H, is given in the instruction itself. An instruction that carries the address of the operand in this way uses direct addressing.

In immediate addressing the operand itself is in the instruction (as in MVI A, 26H), in register addressing the operand is in a register (MOV A, B), and in register indirect addressing a register pair points to the memory location (as in MOV A, M, where HL holds the address). The answer is direct addressing, option B.

Answer: A

In the 8085, LXI (load register pair immediate) is the instruction that loads a 16 bit number into a register pair. The instruction LXI H, 2500H puts 25H in the H register and 00H in the L register, so the H-L pair holds 2500H.

MOV copies one 8 bit register into another (or to memory), so it cannot load the 16 bit value 2500H, and MOV H, 2500H is not a valid instruction. LXI L, 2500H is not valid either, because the register pair is named by its first register, H for the H-L pair. The answer is option A.

Answer: D

The key gives these matches: QUE with slow memory, so a matches 2; the register DX, which holds the port address in the 8086 input and output instructions, with variable port addressing, so b matches 4; DCX D, which does not affect the zero flag in the 8085, so c matches 1; and MUL and DIV, which in the 8051 use register B, so d matches 3. The code is 2 4 1 3. The codes 4 2 3 1 and 4 2 1 3 start with the wrong match for QUE, and 2 4 3 1 swaps the last two. I could not identify QUE from a standard reference, so the first pair rests on the key. The answer is 2 4 1 3.

Answer: B

In the 8085 flag register the sign flag is bit 7 (iv), the zero flag is bit 6 (ii), the auxiliary carry flag is bit 4 (i), and the parity flag is bit 2 (iii). In the order of the list, the sign, parity, zero and auxiliary carry flags give (iv) (iii) (ii) (i), option B. The other codes put the sign flag at bit 4 or bit 6 or the auxiliary carry at bit 7, which does not match the register layout.

Answer: B

The matching is a-iii, b-iv, c-i, d-ii. MOV A, B copies one register into another, which is a data transfer instruction. JNC address jumps if the carry is not set, which is a branching instruction. OR A, B is a logical instruction. ADD A, H adds two registers, which is an arithmetic instruction. Option (A) gives MOV as an arithmetic instruction. Option (C) gives MOV as a branching instruction. Option (D) gives MOV as a branching instruction and JNC as a logical one. Only (B) is right.

Answer: D

From LSB to MSB the flags are carry, parity, zero, sign, which is 3, 1, 2, 4 and option (D). The 8085 flag register holds S, Z, AC, P and CY in bits D7, D6, D4, D2 and D0, with the unused bits D5, D3 and D1 between them. Carry is bit 0, parity is bit 2, zero is bit 6 and sign is bit 7. Option (A) lists the flags in the order they were written, and (B) and (C) place sign or zero too low.

Answer: B

The correct matching is a-iv, b-ii, c-iii, d-i, which is code (B).

DAA, decimal adjust, is an arithmetic instruction (iv). LXI loads a register pair and so is a data movement instruction (ii). RST is a restart, an interrupt instruction (iii), and JMP is a program control instruction (i).

Codes (A), (C) and (D) place at least one instruction in the wrong group, for example JMP among arithmetic ones.

Answer: A

In immediate addressing the operand is part of the instruction, as in LXI H, 2050 (iii). Implied addressing needs no operand, as in RRC (iv). Register addressing names the register, as in MOV A, B (ii), and direct addressing gives the memory address in the instruction, as in LDA 30FF (i). The code is a-iii, b-iv, c-ii, d-i. In direct addressing the operand address follows the opcode, so LDA 30FF fetches from the memory location 30FF. The immediate instruction LXI H loads the data 2050 itself, so the data is in the instruction, and RRC has no operand field. The answer is a-iii, b-iv, c-ii, d-i.

Answer: C

The correct matching is a-iv, b-i, c-ii, d-iii. In the 8085 the accumulator (AC) is the primary register for arithmetic and logical operations. The program counter (PC) holds the address of the next instruction to be executed, after the present one is complete. The HL pair holds a memory address and is used to address external memory. The stack pointer (SP) takes the one description left, as the key has it.

The other options give the accumulator the role of the PC or HL, which is wrong, because the accumulator is the arithmetic register.