Logically, the output of a NOR gate would have the same Boolean expression as a(n):
Answer: B
Correct answer: OR gate immediately followed by an inverter
NOR means NOT-OR: \( (A+B)' \). Inverting the output of an OR gate produces exactly that expression.
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A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?
Answer: B
Correct answer: The output of the gate appears to be open.
A logic probe shows a dim indication when the node is neither HIGH nor LOW but floating, and a floating node does not respond to pulses on the inputs because it is not connected to the gate's output at all. A bad ground would affect the probe's reading everywhere, not just here, and a tristate output would be driven when enabled.
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What is the Boolean expression for a three-input AND gate?
Answer: B
Correct answer: X = A · B · C
AND is a product, written with dots or by juxtaposition. The plus sign denotes OR, and the other two symbols have no meaning in Boolean algebra.
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Which of the following gates has the exact inverse output of the OR gate for all possible input combinations?
Answer: A
Correct answer: NOR
NOR is the complement of OR by definition, so its output is the exact inverse of the OR output for every input combination. NAND inverts AND, not OR, and a NOT gate takes only one input.
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What is the difference between a 7400 and a 7411 IC?
Answer: B
Correct answer: 7400 has four two-input NAND gates; 7411 has three three-input AND gates
The 7400 is the quad two-input NAND that gives the whole family its number, and the 7411 is a triple three-input AND. Both fit a 14-pin package: four gates of two inputs need twelve pins, and three gates of three inputs need twelve as well.
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Write the Boolean expression for an inverter logic gate with input C and output Y.
Answer: B
Correct answer: \( Y = \overline{C} \)
An inverter produces the complement of its input, which is written with an overbar.
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The output of an exclusive-OR gate is HIGH if ________.
Answer: C
Correct answer: the inputs are unequal
XOR is the inequality detector: it gives 1 when its two inputs differ and 0 when they agree. With more than two inputs it gives 1 when an odd number of them are 1, which is the same rule generalised.
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A clock signal with a period of 1 µs is applied to the input of an enable gate. The output must contain six pulses. How long must the enable pulse be active?
Answer: C
Correct answer: Enable must be active for 6 µs.
Each clock period delivers one pulse, so six pulses take six periods:
\[ 6\times 1\ \mu\text{s} = 6\ \mu\text{s} \]
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The AND function can be used to ________ and the OR function can be used to ________ .
Answer: C
Correct answer: enable or disable, enable or disable
Both gates can do either, depending on the level held on the control input. Holding one AND input HIGH passes the signal and holding it LOW blocks it at 0; holding one OR input LOW passes the signal and holding it HIGH blocks it at 1.
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One advantage TTL has over CMOS is that TTL is ________.
Answer: B
Correct answer: not sensitive to electrostatic discharge
CMOS inputs are insulated gates that a static discharge can puncture, so the devices need careful handling; TTL inputs are transistor junctions and are far more robust. On the other three counts CMOS now matches or beats TTL.
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