Computer Network Questions and Answers

Answer: B

Correct answer: the time between an input change and the corresponding output change

Propagation delay is the time taken for a change at the input to appear at the output. It is measured between the 50 per cent points of the two transitions, and it is usually quoted separately for a low-to-high and a high-to-low transition, since the two are rarely equal. It is the fundamental limit on clock speed. The longest chain of gates between two flip-flops - the critical path - must settle within one clock period, so the maximum frequency is the reciprocal of that total delay plus the flip-flop’s own setup time. It is also why a ripple counter is slower than a synchronous one: each stage waits for the one below it, and the delays accumulate. The fourth option describes fan-out, the number of gate inputs a single output can drive, which is a different specification and is itself limited by current and by the loading capacitance that increases the delay.

Answer: C

Correct answer: Registers and cache

Registers sit inside the processor itself, and cache - at least its first level - is fabricated on the same die, so both are reached without a transaction on the external memory bus. That proximity is what makes them fast. The memory hierarchy arranges storage by the trade-off between speed, capacity and cost per bit. Registers are fastest and smallest; L1, L2 and L3 cache follow; then main memory in DRAM; then solid-state and magnetic disk; then optical media and tape at the bottom, slowest and cheapest. Everything below cache is reached over a bus and takes hundreds or millions of cycles rather than one. Only the top three levels are directly addressable by instructions at all. Disk, optical media and tape are secondary storage: their contents must be copied into main memory before the processor can operate on them, which is what an operating system’s input and output subsystem exists to arrange.

Answer: A

Correct answer: Its output can be logic 0, logic 1, or a high-impedance state

A tri-state buffer has an ordinary data input, an output, and an enable control. When enabled it passes the input through; when disabled its output enters a high-impedance state, effectively disconnecting it from the wire. That third state is not a logic level. It is the electrical condition of being neither driving high nor driving low, and it is what makes shared buses possible. Many devices can be wired to the same set of conductors provided that only one is enabled at a time; the rest float and do not interfere. Without it, two outputs driving the same line at opposite levels would create a short circuit from supply to ground - called bus contention - which wastes power and can damage the devices. The high-impedance state is written Z in truth tables and simulation. The alternative arrangement for a shared line is the open-collector or open-drain output with a pull-up resistor.

Answer: A

Correct answer: Physical

A bridge works at the data link layer, so the addresses it reads and learns are the physical, or MAC, addresses in the frame header. Network addresses are inside the payload, where a bridge does not look.

Answer: B

Correct answer: half-duplex

A single track carries trains in both directions but only one at a time, which is exactly half duplex. A double track would be full duplex.

Answer: B

Correct answer: True

The statement is true. In a synchronous counter every flip-flop receives the same clock signal at the same instant, and combinational logic on the J and K inputs decides which stages actually change. The contrast is with an asynchronous or ripple counter, in which only the first flip-flop sees the clock and each subsequent stage is clocked by the output of the one before it. The difference is one of speed and of correctness. In a ripple counter the change propagates from stage to stage, so the delays accumulate and the total settling time is the number of stages multiplied by the propagation delay of one. During that interval the counter passes through transient false states, which can produce glitches if the outputs are decoded. A synchronous counter settles in one gate delay regardless of length, and never shows a false intermediate count. The price is more combinational logic, so ripple counters survive where speed does not matter and simplicity does.

Answer: C

Correct answer: 1.5 × 10⁻⁶ microns

The screen needs

\[ 480\times 640\times 24\times 60 \approx 4.42\times 10^{8}\ \text{bps} \]

and the spectral width for that bandwidth at \( \lambda = 1\ \mu\text{m} \) is

\[ \Delta\lambda = \frac{\lambda^{2}\Delta f}{c} = \frac{(10^{-6})^{2}\times 4.42\times 10^{8}}{3\times 10^{8}} \approx 1.5\times 10^{-12}\ \text{m} \]

which is \( 1.5\times 10^{-6} \) microns - a minute slice of the fibre's available spectrum.

Answer: B

Correct answer: 100 Base-FX

100Base-FX uses optical fibre, which reaches 2000 m. The copper varieties - TX and T4 - are limited to 100 m.

Answer: C

Correct answer: 30,000 GHz

Differentiating \( f = c/\lambda \) gives \( \Delta f = c\,\Delta\lambda/\lambda^{2} \):

\[ \Delta f = \frac{3\times 10^{8}\times 0.1\times 10^{-6}}{(1\times 10^{-6})^{2}} = 3\times 10^{13}\ \text{Hz} = 30{,}000\ \text{GHz} \]

That enormous figure is why a single fibre has so much more capacity than any copper medium.

Answer: A

Correct answer: n -1

With n sequence numbers the window is limited to n−1 frames. If it were n, a completely lost set of acknowledgements would leave the receiver unable to tell a retransmission from a new frame.