Instruction Set Architecture Questions and Answers

Q: A byte addressable computer has a memory capacity of \(2^{m}\) Kbytes and can perform \(2^{n}\) operations. An instruction involving 3 operands and one operator needs a maximum of

The instruction needs at most 3m + n + 30 bits.A memory of \(2^{m}\) Kbytes holds \(2^{m} \times 2^{10} = 2^{m+10}\) bytes, so one address needs \(m + 10\) bits. Three operands need \(3(m + 10) = 3m + 30\) bits and the operation code for \(2^{n}\) operations needs n bits, so the total is \[ 3m + 30 + n \text{ bits}. \]Options A, B and C leave out the 10 address bits that the Kbyte unit adds.

21.

Which of the following flags are set when 'JMP' instruction is executed ?

A.SF and CF
B.AF and CF
C.All flags
D.No flag is set

Exam Year(s)

UGC NET - 2012,

Answer: D

The JMP instruction transfers control to another address, and it does not do any arithmetic or logical operation on data, so it does not set or change any flag of the processor. The sign flag, carry flag and auxiliary carry flag are changed by arithmetic and logic instructions such as ADD or SUB, not by a jump. The keyed answer is that no flag is set.

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22.

Which of the following is a design criteria for instruction formats ?

A.The size of instructions
B.The number of bits in the address fields
C.The sufficient space in the instruction format to express all the operations desired.
D.All of these

Exam Year(s)

UGC NET - 2013,

Answer: D

All of these are design criteria for instruction formats: the size of instructions, the number of bits in the address fields, and the need for sufficient space in the format to express all the desired operations. The designer balances compact instructions against the range of operations and the address space that can be reached.

Since each single listed item is a criterion, choosing only one of them would leave out the others, so the answer is All of these.

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23.

Computers can have instruction formats with

A.only two address and three address instructions
B.only one address and two address instructions
C.only one address, two address and three address instructions
D.zero address, one address, two address and three address instructions

Exam Year(s)

UGC NET - 2013,

Answer: D

Computers can have instruction formats with zero address, one address, two address and three address instructions, which is option (D). Stack machines use zero-address instructions, accumulator machines use one-address instructions, and general register machines use two-address or three-address instructions.

Options (A), (B) and (C) each give only some of these formats, but a computer may have all of them, so they are not complete.

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24.

Which is not a typical program control instruction ?

A.BR
B.JMP
C.SHL
D.TST

Exam Year(s)

UGC NET - 2013,

Answer: C

SHL (shift left) is not a typical program control instruction: it is a data manipulation instruction of the shift group. The answer is (C).

BR (branch) and JMP (jump) are the unconditional transfers of control, and TST (test) is used to set the status bits on which a conditional branch depends. These belong to the program control group, so (A), (B) and (D) are wrong.

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25.

A byte addressable computer has a memory capacity of \(2^{m}\) Kbytes and can perform \(2^{n}\) operations. An instruction involving 3 operands and one operator needs a maximum of

A.3m bits
B.m + n bits
C.3m + n bits
D.3m + n + 30 bits

Exam Year(s)

UGC NET - 2014,

Answer: D

The instruction needs at most 3m + n + 30 bits.

A memory of \(2^{m}\) Kbytes holds \(2^{m} \times 2^{10} = 2^{m+10}\) bytes, so one address needs \(m + 10\) bits. Three operands need \(3(m + 10) = 3m + 30\) bits and the operation code for \(2^{n}\) operations needs n bits, so the total is \[ 3m + 30 + n \text{ bits}. \]

Options A, B and C leave out the 10 address bits that the Kbyte unit adds.

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