Computer Network Questions and Answers

Answer: B

Correct answer: True

The statement is true, and it is the feature that makes the JK flip-flop the most versatile of the four types. Its behaviour on a clock edge is: J = 0, K = 0 holds the previous state; J = 0, K = 1 resets to 0; J = 1, K = 0 sets to 1; and J = 1, K = 1 toggles, so the output becomes the complement of what it was. The toggle case is precisely what the SR flip-flop cannot do. In an SR flip-flop, setting both inputs high is a forbidden condition, because it drives both outputs to the same level and leaves the next state indeterminate when the inputs are released. The JK resolves that by feeding the outputs back into the input gating, turning the invalid case into a useful one. Tying J and K together to a permanent 1 gives a T flip-flop, which toggles on every clock pulse - and that is the building block of binary counters, since each stage divides the frequency by two.

Answer: B

Correct answer: False

The statement is false. A positive-edge-triggered flip-flop responds on the rising edge of the clock - the transition from low to high. A negative-edge-triggered device responds on the falling edge. On a circuit diagram the two are distinguished by a small triangle at the clock input, with an added inversion bubble marking negative-edge triggering. The choice between them is a design convention rather than a matter of correctness, but mixing the two in one design creates a half-cycle timing difference that must be accounted for, and is a common source of error. Two timing requirements attach to either kind. The data must be stable for the setup time before the active edge and for the hold time after it. Violating them can leave the flip-flop metastable, hovering between levels for an unpredictable interval - the reason asynchronous inputs are passed through two flip-flops in series before use.

Answer: B

Correct answer: True

The statement is true. XNOR - exclusive NOR - gives 1 when its inputs are equal and 0 when they differ, which is the complement of XOR. Its truth table runs: 0,0 gives 1; 0,1 gives 0; 1,0 gives 0; 1,1 gives 1. For that reason it is also called the equivalence or coincidence gate, and its Boolean expression is \( AB + \bar{A}\bar{B} \). Its natural application is comparison. A chain of XNOR gates, one per bit pair, with their outputs ANDed together, forms an equality comparator: the result is 1 only if every bit matches. XOR does the opposite job and is used for parity generation and checking, since its output tells whether the number of 1s is odd. A useful identity: \( A \odot B = \overline{A \oplus B} \), so an XNOR is simply an XOR followed by an inverter, and the bubble on the symbol shows exactly that.

Answer: B

Correct answer: True

The statement is true. This is the absorption law, and it is one of the most useful identities for simplifying expressions. The proof is short: \[ A + A\cdot B = A(1 + B) = A \cdot 1 = A, \] using the distributive law and then the null law \( 1 + B = 1 \), which holds because ORing anything with 1 gives 1. It can also be seen by inspection. If \( A = 1 \) the whole expression is 1 whatever B may be; if \( A = 0 \) then both terms are 0. So the value depends only on A, and B is absorbed. Its dual is \( A \cdot (A + B) = A \), and a related form is \( A + \bar{A}B = A + B \), which is not absorption and is worth keeping distinct. These identities matter because every gate removed from a design saves cost, power and propagation delay - the same purpose served by Karnaugh maps and the Quine–McCluskey method for larger expressions.

Answer: A

Correct answer: True

The statement is true, and it is the defining property of combinational logic. Given the same inputs a combinational circuit always produces the same outputs, whatever happened before. Adders, multiplexers, decoders, encoders, comparators and code converters are all combinational, and each can be fully described by a truth table. The contrast is with sequential logic, whose output depends on the present inputs and on stored state. Flip-flops, latches, registers and counters are sequential, and they are described by state tables and state diagrams rather than by truth tables alone. The distinction matters in design because sequential circuits need a clock and raise questions of timing - setup time, hold time, metastability - that combinational circuits do not. Every sequential circuit contains combinational logic as its next-state and output logic, so the two are layered rather than opposed.

Answer: A

Correct answer: False

A combinational circuit has no memory: its output at any moment is determined entirely by the inputs present at that moment. Circuits whose output also depends on past inputs are sequential, and they achieve it with flip-flops.

Answer: A

Correct answer: True

The statement is true. This is the complement law of Boolean algebra: a variable ORed with its own complement always gives 1. The reasoning is exhaustive. If \( A = 0 \) then \( \bar{A} = 1 \), and \( 0 + 1 = 1 \). If \( A = 1 \) then \( \bar{A} = 0 \), and \( 1 + 0 = 1 \). No third case exists in a two-valued algebra, so the result is 1 whatever A may be. Its dual is equally useful: \( A \cdot \bar{A} = 0 \), since a variable and its complement can never both be 1. The complement laws are among the basic identities used to simplify expressions, alongside the identity laws \( A + 0 = A \) and \( A \cdot 1 = A \), the null laws \( A + 1 = 1 \) and \( A \cdot 0 = 0 \), and the idempotent laws \( A + A = A \) and \( A \cdot A = A \). Note that in Boolean algebra + means OR, not arithmetic addition, which is why \( 1 + 1 = 1 \) rather than 2.

Answer: B

Correct answer: True

The statement is true. The NOT gate, or inverter, has a single input and produces its complement: 0 becomes 1 and 1 becomes 0. Its Boolean expression is \( Y = \bar{A} \). It is the only basic gate with one input; every other takes two or more. On a diagram it is drawn as a triangle with a small circle at the output, and that circle - the bubble - is the general symbol for inversion, which is why NAND is drawn as AND with a bubble and NOR as OR with one. Two inverters in series cancel, giving \( \bar{\bar{A}} = A \), which is the involution law of Boolean algebra. Pairs of inverters are nevertheless used deliberately as buffers, to restore signal strength without changing the logic. An inverter is easily made from either universal gate by tying the inputs together: a NAND or a NOR with both inputs joined behaves exactly as a NOT.

Answer: B

Correct answer: True

The statement is true. An OR gate outputs 1 when any of its inputs is 1, and 0 only when every input is 0. Its Boolean expression is \( Y = A + B \). Its truth table for two inputs runs: 0,0 gives 0; 0,1 gives 1; 1,0 gives 1; 1,1 gives 1. Only the first row gives 0, which is why the OR gate is sometimes described by what makes it low rather than what makes it high. The contrast is with the AND gate, whose output is 1 only when all inputs are 1, expressed as \( Y = A \cdot B \). The gate to distinguish it from is XOR, exclusive OR, whose output is 1 when the inputs differ - so 1,1 gives 0 rather than 1. The ordinary OR is sometimes called inclusive OR for that reason. Note that the symbol \( + \) in Boolean algebra means OR, not addition, so \( 1 + 1 = 1 \).

Answer: A

Correct answer: True

The statement is true. This is the distributive law, and it is the same identity as in ordinary algebra, where multiplication distributes over addition. What has no ordinary counterpart is its dual, which also holds in Boolean algebra: \[ A + B\cdot C = (A + B)(A + C). \] Addition distributes over multiplication, which is false for numbers and true here - a good illustration that Boolean algebra is a different system despite the familiar notation. Every Boolean identity has such a dual, obtained by exchanging AND with OR and 0 with 1. The pairing runs through the whole set: \( A + 0 = A \) with \( A \cdot 1 = A \), \( A + 1 = 1 \) with \( A \cdot 0 = 0 \), and De Morgan’s two theorems with each other. The distributive law is what allows an expression to be converted between sum-of-products and product-of-sums form, which is the first step in most simplification.