Discussion
Assertion (A): Instruction scheduling and register allocation are in tension with one another.
Reason (R): Spreading instructions apart to hide latency lengthens the lifetimes of values and so demands more registers.
Answer: C
Correct answer: Both A and R are true, and R is the correct explanation of A
Both are true and the reason gives the mechanism. The scheduler separates a load from its use to cover the latency, which keeps the loaded value alive across the gap; do that for many values at once and the register pressure rises until the allocator must spill. Scheduling before allocation gives good schedules with spills, and after it gives poor schedules without - hence the various combined approaches.
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