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Assertion (A) : An half adder is faster than full-adder.

Reason (R) : An half adder gives only one output while a full adder gives two outputs.

  • A.Both (A) and (R) are true and (R) is the correct explanation of (A).
  • B.Both (A) and (R) are true, but (R) is not correct explanation of (A).
  • C.(A) is true, but (R) is false.
  • D.(A) is false, but (R) is true.

Answer: C

The keyed answer is (A) true and (R) false. A half adder has a single gate delay for each output, an XOR for the sum and an AND for the carry, whereas a full adder has to combine three inputs, so the half adder is faster and (A) is true. The reason claims that the half adder gives only one output while the full adder gives two, which is wrong: both circuits have two outputs, a sum and a carry. Hence (R) is false and option C is correct.

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