Discussion
The "carry look ripple delay" is eliminated in :
Answer: B
The carry ripple delay is eliminated in the carry-look-ahead adder circuit.
In a ripple-carry parallel adder each full adder must wait for the carry from the stage below, so the delay grows with the number of bits. A carry-look-ahead adder computes generate \(G_{i} = A_{i}B_{i}\) and propagate \(P_{i} = A_{i} \oplus B_{i}\) for each bit and then forms every carry directly from them and the input carry:
\[ C_{i+1} = G_{i} + P_{i}C_{i} \]
expanded so that all carries appear after a fixed number of gate delays. An ordinary parallel adder is the ripple-carry circuit that has the delay, and a single full adder or half adder (printed 'Haff-adder') handles one bit and does nothing about ripple.
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