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In a JK flip-flop, what happens when both J and K are HIGH at the clock edge ?

  • A.The output is set to 1
  • B.The output is reset to 0
  • C.The output toggles
  • D.The output is unchanged

Answer: B

Correct answer: The output toggles

With J = K = 1 the JK flip-flop toggles, changing state on every clock edge. This is the case the SR flip-flop leaves undefined, and removing that forbidden state is the reason the JK design exists.

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