Discussion
A latch is level-triggered while a flip-flop is edge-triggered.
Answer: A
Correct answer: True
The statement is true, and it is the standard distinction between the two. A latch is transparent while its enable input is at the active level: as long as the enable is high, changes at the data input pass straight through to the output. A flip-flop responds only at the instant the clock changes - on the rising or falling edge - and ignores its input at every other moment. That difference matters greatly in synchronous design. Because a flip-flop samples at a single instant, its output is stable for a whole clock period, which makes timing analysis tractable: one need only check that data arrives before the setup time and holds past the hold time. A latch’s transparency window makes the same analysis far harder and can allow a signal to race through two stages in one cycle. Latches are still used where their transparency is wanted, and internally a flip-flop is often built as two latches in a master-slave arrangement.
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