Discussion
A 4-bit ring counter is loaded with 1000 data and 100 kHz clock input. The output at \(Q_0\) would be :
Answer: B
The output at \(Q_0\) is 25 kHz with 25% duty cycle.
A 4-bit ring counter loaded with 1000 circulates the single 1 through its four stages, so each output is high for one clock period out of every four. The output frequency and duty cycle are
\[ \begin{aligned} f &= \frac{100\ \text{kHz}}{4} = 25\ \text{kHz} \\ D &= \frac{1}{4} = 25\% \end{aligned} \]
50 kHz would come from dividing by 2, as a single toggle flip-flop does, and a 50% duty cycle would need the output high for two of the four clock periods, as in a Johnson counter.
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