Discussion
Which of the following is/are part of an Instruction Set Architecture of a processor?
Answer: D
Only the total number of registers is part of the Instruction Set Architecture.
The ISA is the interface between hardware and software: everything a machine-language programmer or compiler must know, such as the instructions, addressing modes, data types and the programmer-visible registers. Instructions name registers in their operand fields, so the number of registers is fixed by the ISA.
The size of the cache, the number of cache levels and the clock frequency are properties of a particular implementation (the microarchitecture). Two processors with the same ISA can differ in all three and still run the same programs unchanged, which is why none of them is part of the ISA.
Post your comment
Please log in or register to post a comment.
Examination Categories
- SSC Exams
- Banking Exams
- Teaching Exams
- Civil Services Exams
- Railways Exams
- Engineering Recruitment Exams
- Defence Exams
- State Government Exams
- Police Exams
- Insurance Exams
- Nursing Exams
- Other Government Exams
- NRA CET
- PG Entrance Exams
- Campus Placement
- MBA Entrance Exams
- CUET and UG Entrance
- Judiciary Exams
- Regulatory Body Exams
- Software Development