Discussion
In 8051 which interrupt has highest priority ?
Answer: C
In the 8051 the highest priority interrupt among those listed is IE0, external interrupt 0.
When interrupts of the same priority level are pending together, the 8051 resolves them by a fixed internal polling sequence:
- IE0, external interrupt 0
- TF0, timer 0 overflow
- IE1, external interrupt 1
- TF1, timer 1 overflow
- RI/TI, serial port
So TF0 comes second, IE1 third and TF1 fourth. (Reset has the highest priority of all, but it is not one of the options.) The IP register can raise any source to the high priority level, but the question asks about the default order.
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