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Suppose a program is running on a non-pipelined single processor computer system. The computer is connected to an external device that can interrupt the processor asynchronously. The processor needs to execute the interrupt service routine (ISR) to serve this interrupt. The following steps (not necessarily in order) are taken by the processor when the interrupt arrives:

(i) The processor saves the content of the program counter.
(ii) The program counter is loaded with the start address of the ISR.
(iii) The processor finishes the present instruction.

Which ONE of the following is the CORRECT sequence of steps?

  • A.(iii), (i), (ii)
  • B.(i), (iii), (ii)
  • C.(i), (ii), (iii)
  • D.(iii), (ii), (i)

Answer: A

The correct sequence is (iii), (i), (ii).

A non-pipelined processor checks for interrupts only at instruction boundaries, so it first finishes the present instruction (iii); an instruction left half done could not be resumed cleanly. It then saves the program counter (i), which now holds the address of the next instruction, so that execution can return there after the ISR. Only then is the PC loaded with the start address of the ISR (ii), transferring control to the handler.

Saving the PC before finishing the instruction (options starting with (i)) would save the wrong return address. Loading the ISR address before saving the PC, as in (iii), (ii), (i), would overwrite the return address and lose it.

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