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The word size of memory IC can be increased by connecting 2 memory ICs in such a way that their :

  • A.Data bus is in series and address bus in parallel
  • B.Data bus is in parallel and address bus in parallel
  • C.Data bus is in series and address bus in series
  • D.Data bus is in parallel and address bus in series

Answer: A

The key's answer is Data bus is in series and address bus in parallel.

To widen the word, both chips must respond to the same address, so their address lines (and chip selects) are connected in common, in parallel. Their data lines are not shared: one chip supplies the lower bits and the other the upper bits, placed one after the other to form a bus twice as wide, which the paper calls the data bus in series. Two 1K × 4 chips connected this way make a 1K × 8 memory.

The opposite arrangement, data lines in common and the address range extended with a decoder, increases the number of words, not the word size. Connecting both buses in common would make the two chips drive the same data lines at once.

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