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For a design whose only computation is reading a switch and driving a relay every 100 ms, the appropriate core is

  • A.a 32-bit part clocked at over 100 MHz for future headroom
  • B.an application processor able to run a general purpose kernel
  • C.a digital signal processor, for its deterministic timing
  • D.the cheapest 8-bit part with enough pins

Answer: D

The computation is trivial and the deadline enormous, so nothing beyond the smallest part is justified and the pennies matter. Specifying performance nobody needs is one of the commonest and least defensible cost overruns in embedded design.

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