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Assume that an instruction pipeline has 5 stages without any branch prediction. Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO) with state delays as 6, 8, 6, 5 and 4 ns respectively.

Consider a program with 15 instructions (I1 .... I15) where only I7 is a branch instruction and I12 is the target instruction.

If the branch is taken during execution of the program then what is the time needed to complete the program ?

  • A.210ns
  • B.216ns
  • C.25ns
  • D.144ns

Answer: D

The program takes 144ns.

A pipeline's clock must suit its slowest stage, so the cycle time is 8 ns. Because the branch I7 is taken to I12, only I1 to I7 and I12 to I15 are completed: 11 instructions.

With no branch prediction, the outcome is known only when I7 reaches Execute (stage 4). The three instructions fetched after it (I8, I9, I10) are flushed, a penalty of 3 cycles.

\[ \begin{aligned} \text{cycles} &= (k - 1) + n + \text{penalty} \\ &= 4 + 11 + 3 = 18 \\ \text{time} &= 18 \times 8 = 144\ \text{ns} \end{aligned} \]

Running all 15 instructions without the branch would take (4 + 15) x 8 = 152 ns. 210 and 216 ns ignore pipelining, and 25 ns is a single instruction's latency without the common clock.

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