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Why must a sample-and-hold circuit's droop be kept small?

  • A.Droop causes aliasing of components near half the rate
  • B.A falling value overloads the following quantiser stage
  • C.A falling held value distorts the recovered signal
  • D.Droop raises the effective sampling rate of the system

Answer: C

Droop means the held value is not quite the sampled value by the time it is used, which appears as an amplitude error and hence distortion. It does not change the sampling rate, cannot cause aliasing, which is settled before the sampler, and would reduce rather than increase the level presented to a quantiser. Any circuit asked to remember a value has to be specified for how well it remembers it, and here that specification is volts per second. Working one numerical case through both schemes side by side fixes the distinction better than any rule of thumb.

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