Your Answer : (Not Answered)

Correct Answer : C

The register is SBUF.

SBUF (serial buffer) at SFR address 99H is really two registers at one address: writing to it loads the transmit buffer and starts transmission, and reading it returns the byte received.

SCON is the serial control register, which sets the mode and holds the TI and RI flags. PCON holds the SMOD bit that doubles the baud rate, among power control bits. The accumulator only passes data to and from SBUF; it is not the serial buffer.

Your Answer : (Not Answered)

Correct Answer : C

SIM stands for set interrupt mask.

SIM takes the contents of the accumulator and uses them to mask or unmask the RST 7.5, 6.5 and 5.5 interrupts, reset the RST 7.5 flip-flop, and send a bit on the serial output data line SOD. Its companion RIM (read interrupt mask) reads the mask status, pending interrupts and the serial input SID.

'Select', 'sort' and 'subscribe' do not appear in the 8085 mnemonics; they are distractors built on the same initials.

Your Answer : (Not Answered)

Correct Answer : B

RST 6 transfers execution to 0030 H.

The 8085 restart instruction RST n is a one-byte call to the address 8 × n. For n = 6 that is 48 in decimal, which is 30 in hexadecimal, so the vector is 0030H.

0024H is the vector of the TRAP interrupt (RST 4.5). 0048H writes the decimal value 48 as if it were hexadecimal, and 0060H would correspond to n = 12, which does not exist among RST 0 to RST 7.

Your Answer : (Not Answered)

Correct Answer : B

The 8086 instruction queue is 6 bytes long.

The bus interface unit of the 8086 prefetches instruction bytes into a 6-byte first-in, first-out queue while the execution unit is busy decoding and executing earlier instructions. This overlap of fetch and execute is a simple form of pipelining and speeds up execution.

The 8088, which has an 8-bit external data bus, has a 4-byte queue, which is the usual source of the 4-byte distractor. 8 bytes and 2 bytes are not the queue length of either processor.

Your Answer : (Not Answered)

Correct Answer : D

The stack pointer decrements by 2.

In the 8085, PUSH PSW saves the program status word, the accumulator and the flag register, which is two bytes. The stack grows downward: the stack pointer is decremented and the accumulator stored, then decremented again and the flags stored. Net, SP decreases by 2.

Every PUSH in the 8085 moves a register pair, so SP never changes by 1. The stack pointer increments by 2 only on a POP, which removes data from the stack.

Your Answer : (Not Answered)

Correct Answer : B

The keyed answer is memory mapped IOs and IO mapped IOs.

In the 8085, the \(IO/\overline{M}\) line tells external circuits whether the address on the bus belongs to the I/O space or to memory. It is high for IN and OUT instructions, which address ports in the separate I/O space (I/O mapped I/O), and low for memory operations, which include devices placed in the memory address space (memory mapped I/O).

It plays no part in telling keyboard input from memory, serial from parallel communication, or synchronous from asynchronous transfers.

Your Answer : (Not Answered)

Correct Answer : C

The internal RAM of the 8051 is 128 bytes.

The 8051 microcontroller has 128 bytes of on-chip data RAM (addresses 00H to 7FH), holding four register banks of 8 registers each, a 16-byte bit-addressable area and a general-purpose scratch pad. It also has 4 KB of on-chip ROM and can address 64 KB of external memory.

32 bytes is only the four register banks, 64 bytes is not an 8051 figure, and 64 KB is the external program or data memory space, not internal RAM. The 8052 variant doubles the internal RAM to 256 bytes.

Your Answer : (Not Answered)

Correct Answer : B

The correct matching is a-iii, b-iv, c-ii, d-i.

The 8085 status signals S1 and S0 identify the type of machine cycle:

• S1 = 0, S0 = 0: HALT (iii)
• S1 = 0, S0 = 1: memory or I/O WRITE (iv)
• S1 = 1, S0 = 0: memory or I/O READ (ii)
• S1 = 1, S0 = 1: OPCODE FETCH (i)

Opcode fetch has both bits set, which rules out the code pairing it with 00, and the code that pairs 01 with READ swaps the read and write cycles.

Your Answer : (Not Answered)

Correct Answer : D

The order is fetch, decode, execute.

A processor first fetches the instruction from memory at the address held in the program counter, then decodes it to determine the operation and operands, and only then executes it. The cycle then repeats for the next instruction.

An instruction cannot be decoded before it has been fetched, nor executed before it has been decoded, so every other ordering among the options is impossible.

Your Answer : (Not Answered)

Correct Answer : A

In the 8085, LXI (load register pair immediate) is the instruction that loads a 16 bit number into a register pair. The instruction LXI H, 2500H puts 25H in the H register and 00H in the L register, so the H-L pair holds 2500H.

MOV copies one 8 bit register into another (or to memory), so it cannot load the 16 bit value 2500H, and MOV H, 2500H is not a valid instruction. LXI L, 2500H is not valid either, because the register pair is named by its first register, H for the H-L pair. The answer is option A.

Your Answer : (Not Answered)

Correct Answer : B

In the 8085, the instruction LDA 2600H loads the accumulator with the contents of the memory location whose 16 bit address, 2600H, is given in the instruction itself. An instruction that carries the address of the operand in this way uses direct addressing.

In immediate addressing the operand itself is in the instruction (as in MVI A, 26H), in register addressing the operand is in a register (MOV A, B), and in register indirect addressing a register pair points to the memory location (as in MOV A, M, where HL holds the address). The answer is direct addressing, option B.

Your Answer : (Not Answered)

Correct Answer : D

RAL rotates the accumulator one bit to the left through the carry flag: the most significant bit goes into CY, and the old CY goes into bit 0.

\[ \text{AAH} = 1010\ 1010,\quad CY = 0 \]

After the first RAL: the accumulator is \(0101\ 0100 = 54\text{H}\) and CY = 1.

After the second RAL: the accumulator is \(1010\ 1001 = \text{A9H}\) and CY = 0.

The value AAH would result from rotating by 8 positions through the carry, 9AH and 99H come from wrong rotations. The answer is A9H, option D.