Flip Flops and Latches Questions and Answers

Answer: A

The key's answer is that the binding energy of each fission fragment is greater than that of U-235, read as binding energy per nucleon.

U-235 is bound by about 7·6 MeV per nucleon, while nuclei in the mass range of the fragments, near the peak of the binding-energy curve, are bound by about 8·5 MeV per nucleon. When the nucleus splits, its nucleons become more tightly bound, and the extra binding, about 0·9 MeV for each of 235 nucleons, roughly 200 MeV, is released.

Taken as total binding energy, a single fragment has less than the whole uranium nucleus, but that comparison does not explain any release, so option B is wrong. If the sums were equal (option C) no energy would be released, and the difference of the fragments' binding energies (option D) has no physical meaning here.

Answer: B

The state diagram of a JK flip-flop has two states.

A flip-flop stores one bit, so it has exactly two states, Q = 0 and Q = 1. The JK inputs only determine the transitions: J = 1 moves it from 0 to 1, K = 1 from 1 to 0, J = K = 1 toggles, and J = K = 0 holds.

Four is the number of input combinations of J and K, not the number of states; one or three states do not correspond to a one-bit memory.

Answer: D

It is transparent when the output follows the input.

A level-triggered D latch (often loosely called a D flip-flop in such questions) is transparent while its enable or clock is active: the output Q copies the D input continuously, as if the device were not there. When the enable goes inactive, Q holds the last value.

Transparency is not about the output being LOW or HIGH, which are just two possible output values. The output does not follow the clock either: the clock only decides when the output follows the input.

Answer: B

The key gives change in the output occurs when the state of the slave is affected.

In a master-slave JK flip-flop the master accepts the J and K inputs while the clock is high, and the slave, driven by the master, changes only when the clock goes low. The output Q is taken from the slave, so the output changes only when the slave changes state, half a clock cycle after the master.

The input is therefore not reflected in the output immediately. A change in the master alone does not appear at the output until the slave copies it, and the master and slave never change at the same time, since one is enabled when the other is disabled.

Answer: D

The race-around condition is avoided by a master slave JK flip-flop.

In a level-triggered JK flip-flop with J = K = 1, the output toggles and the new output is fed straight back to the gates while the clock is still high, so it toggles again and again for as long as the clock pulse lasts. The final state is unpredictable. In the master-slave arrangement the master accepts the inputs while the clock is high, and the slave copies the master only when the clock goes low. The fed-back output therefore cannot change during the time the master is enabled, and the flip-flop toggles exactly once per clock pulse.

Edge triggering is the other cure. A shift register, full adder or AND gate does nothing to stop the repeated toggling.

Answer: B

The basic memory element is the SR flip-flop.

The SR (set-reset) latch, made of two cross-coupled NOR or NAND gates, is the simplest circuit that stores one bit: once set or reset, it holds its state after the inputs return to rest. The other flip-flops are built from it.

The D, JK and T flip-flops are refinements of the SR design (the D removes the invalid input, the JK and T allow toggling), so the key treats SR as the basic element.

Answer: C

The key takes all three statements as correct, option (C). Statement I is true, since a flip-flop stores one bit. Statement II is true: in a J-K flip-flop with both inputs at 1, the output toggles, and if the clock pulse stays high longer than the propagation delay, the output toggles again and again, which is the race-around condition that master-slave construction removes. Statement III is accepted by the key, because a transparent latch is the D-type element that follows its input while the enable is high. Option (A) leaves out III, option (B) leaves out II, and option (D) denies all. The wording of III is loose, so the item follows the key.

Answer: C

Statements (i), (ii) and (iv) are true, the third option. A flip-flop stores one bit, the race-around condition occurs in a J-K flip-flop when J and K are both 1 and the clock pulse is longer than the propagation delay, and a transparent latch is built on a D-type element.

Statement (iii) is false: master-slave connection is used to remove the race-around condition and the device still stores one bit, not two. So the options with (iii) are wrong, and option (i) only is incomplete.

Answer: C

A latch is a D flip-flop in the sense of this question.

A D latch passes the input to the output while the enable is active and holds the value when it is not, so it stores one bit, and it is the standard latch circuit.

The master-slave JK is built from two latches and is edge-triggered, so it is not a latch. The T and JK flip-flops are toggling types and are not what is called a latch.

A latch is level sensitive, while a flip-flop is edge triggered, which is the real difference between them. Because of that, the output of a D latch follows the input for the whole time the enable is high.

Answer: A

The correct matching is a-iv, b-i, c-ii, d-iii, which is code (A).

An R-S flip-flop can be used as a latch (iv), a D flip-flop gives a delay (i), a master-slave flip-flop does not have the race problem (ii) and a JK flip-flop can be used in shift registers (iii).

Codes (B), (C) and (D) give the race-free property or the delay function to the wrong flip-flop.

The delay behaviour comes from the D flip-flop, since its output copies the input after one clock pulse. The race problem of the JK flip-flop is overcome by the master-slave arrangement, which isolates the input from the output during the clock pulse, and JK flip-flops are used to build shift registers and counters.