Logic Gates Questions and Answers

Q: Which one of the following set of gates are best suited for 'parity' checking and 'parity' generation.

Correct answer: EX-NOR or EX-OR gatesXOR gives 1 when an odd number of inputs is 1, so a chain of XOR gates across a word computes its parity directly. That single property serves both purposes: generating the parity bit to be sent, and checking it on arrival. XNOR does the same with the opposite sense.

Q: An exclusive-OR gate output is HIGH when the inputs are unequal.

Correct answer: TrueXOR is the inequality detector: its output is HIGH exactly when its two inputs differ.

Q: If A &oplus; B = C, then

Correct answer: Both (a) & (b)XOR is its own inverse, so an equation may be rearranged freely: from \( A\oplus B=C \), XOR both sides with \(B\) to get \( A = B\oplus C \), or with \(A\) to get \( B = A\oplus C \). Both rearrangements hold, which is why the third option - \( A\oplus B\oplus C = 0 \) - is also true but is not the only one.

Q: How many inputs are on the logic gates of a 74HC21 IC?

Correct answer: 4The 74HC21 is a dual four-input AND gate: two gates of four inputs each, which fits a 14-pin package with two pins to spare for supply and ground.

Q: An OR gate can be imagined as

Correct answer: Switches connected in parallelWith switches in parallel, closing any one of them completes the circuit, which is the OR condition. Switches in series need every one closed, which gives AND.

Q: Extremely low power dissipation and low cost per gate can be achieved in:

Correct answer: C MOS ICsCMOS draws current essentially only while switching, so its static power dissipation is negligible - far below TTL or ECL - and its simple structure gives a low cost per gate. That combination is why CMOS displaced the other families.

Q: How many entries would a truth table for a four-input NAND gate have?

Correct answer: 16The number of rows depends only on the number of inputs, not on the function: \( 2^4 = 16 \) for any four-input gate.

Q: Which one of the following will give the sum of full adders as output ?

Correct answer: Three bit parity checkerThe sum output of a full adder is \( A \oplus B \oplus C_{in} \) - it is 1 whenever an odd number of the three inputs is 1. That is precisely what a three-bit parity checker computes. The carry output, by contrast, is the majority function of the same three bits.

Q: The maximum frequency at which digital data can be applied to gate is caled

Correct answer: Operating speedThe operating speed of a gate is the highest frequency at which it can still follow its input - set by its propagation delay, since a gate cannot respond faster than it can switch.

Q: The output of NOR gate is

Correct answer: High if all of its inputs are lowNOR is the complement of OR, and OR is 0 only when every input is 0. So NOR is 1 in exactly that one case - all inputs low - and 0 otherwise.

61.

Which one of the following set of gates are best suited for 'parity' checking and 'parity' generation.

A.AND, OR, NOT gates
B.EX-NOR or EX-OR gates
C.NAND gates
D.NOR gates

Answer: B

Correct answer: EX-NOR or EX-OR gates

XOR gives 1 when an odd number of inputs is 1, so a chain of XOR gates across a word computes its parity directly. That single property serves both purposes: generating the parity bit to be sent, and checking it on arrival. XNOR does the same with the opposite sense.

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62.

An exclusive-OR gate output is HIGH when the inputs are unequal.

A.True
B.False

Answer: A

Correct answer: True

XOR is the inequality detector: its output is HIGH exactly when its two inputs differ.

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63.

If A ⊕ B = C, then

A.A ⊕ C = B
B.B ⊕ C = A
C.A ⊕ B ⊕ C = 0
D.Both (a) & (b)

Answer: D

Correct answer: Both (a) & (b)

XOR is its own inverse, so an equation may be rearranged freely: from \( A\oplus B=C \), XOR both sides with \(B\) to get \( A = B\oplus C \), or with \(A\) to get \( B = A\oplus C \). Both rearrangements hold, which is why the third option - \( A\oplus B\oplus C = 0 \) - is also true but is not the only one.

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64.

How many inputs are on the logic gates of a 74HC21 IC?

Answer: D

Correct answer: 4

The 74HC21 is a dual four-input AND gate: two gates of four inputs each, which fits a 14-pin package with two pins to spare for supply and ground.

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65.

An OR gate can be imagined as

A.Switches connected in series
B.Switches connected in parallel
C.MOS transistors connected in series
D.None of these

Answer: B

Correct answer: Switches connected in parallel

With switches in parallel, closing any one of them completes the circuit, which is the OR condition. Switches in series need every one closed, which gives AND.

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66.

Extremely low power dissipation and low cost per gate can be achieved in:

A.MOS ICs
B.C MOS ICs
C.TTL ICs
D.ECL ICs

Answer: B

Correct answer: C MOS ICs

CMOS draws current essentially only while switching, so its static power dissipation is negligible - far below TTL or ECL - and its simple structure gives a low cost per gate. That combination is why CMOS displaced the other families.

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67.

How many entries would a truth table for a four-input NAND gate have?

A.2
B.8
C.16
D.32

Answer: C

Correct answer: 16

The number of rows depends only on the number of inputs, not on the function: \( 2^4 = 16 \) for any four-input gate.

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68.

Which one of the following will give the sum of full adders as output ?

A.Three point majority circuit
B.Three bit parity checker
C.Three bit comparator
D.Three bit counter

Answer: D

Correct answer: Three bit parity checker

The sum output of a full adder is \( A \oplus B \oplus C_{in} \) - it is 1 whenever an odd number of the three inputs is 1. That is precisely what a three-bit parity checker computes. The carry output, by contrast, is the majority function of the same three bits.

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69.

The maximum frequency at which digital data can be applied to gate is caled

A.Operating speed
B.Propagation speed
C.Binary level transaction period
D.Charging time

Answer: A

Correct answer: Operating speed

The operating speed of a gate is the highest frequency at which it can still follow its input - set by its propagation delay, since a gate cannot respond faster than it can switch.

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70.

The output of NOR gate is

A.High if all of its inputs are high
B.Low if all of its inputs are low
C.High if all of its inputs are low
D.High if only of its inputs is low

Answer: C

Correct answer: High if all of its inputs are low

NOR is the complement of OR, and OR is 0 only when every input is 0. So NOR is 1 in exactly that one case - all inputs low - and 0 otherwise.

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