In a synchronous counter, all flip-flops are clocked simultaneously.
Answer: B
Correct answer: True
The statement is true. In a synchronous counter every flip-flop receives the same clock signal at the same instant, and combinational logic on the J and K inputs decides which stages actually change. The contrast is with an asynchronous or ripple counter, in which only the first flip-flop sees the clock and each subsequent stage is clocked by the output of the one before it. The difference is one of speed and of correctness. In a ripple counter the change propagates from stage to stage, so the delays accumulate and the total settling time is the number of stages multiplied by the propagation delay of one. During that interval the counter passes through transient false states, which can produce glitches if the outputs are decoded. A synchronous counter settles in one gate delay regardless of length, and never shows a false intermediate count. The price is more combinational logic, so ripple counters survive where speed does not matter and simplicity does.
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