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Paging and Segmentation Questions and Answers

1.

Consider a demand paging memory management system with 32-bit logical address, 20-bit physical address, and page size of 2048 bytes. Assuming that the memory is byte addressable, what is the maximum number of entries in the page table?

Exam Year(s)

GATE CS - 2025,

Answer: A

The maximum number of page table entries is \(2^{21}\).

A single-level page table needs one entry for each page of the logical address space. The page size is \(2048 = 2^{11}\) bytes, so 11 of the 32 logical address bits are the offset within a page:

\[ \text{entries} = \frac{2^{32}}{2^{11}} = 2^{21} \]

The 20-bit physical address decides the number of frames, \(2^{20}/2^{11} = 2^{9}\), and the width of each entry, but not how many entries there are. \(2^{20}\) wrongly takes the physical address width, and \(2^{22}\) and \(2^{24}\) assume smaller pages.

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2.

The page table is maintained by operating system for :

Exam Year(s)

MH SET - 2018, SET Exam - 2018,

Answer: B

The operating system keeps a page table for each process.

Each process has its own logical address space, so each needs its own mapping from page numbers to frame numbers. The page table's location is saved in the process control block, and on a context switch the operating system loads the new process's page table base register.

Threads of one process share its address space and therefore its page table. A table per instruction or per address would make no sense, since the page table itself is what maps addresses.

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3.

A virtual memory has a page size of 1K words. There are eight pages and four blocks. The associative memory page table contains the following entries :

PageBlock
03
21
52
70

Which of the following lists of virtual addresses (in decimal) will NOT cause any page fault if referenced by the CPU ?

Exam Year(s)

MH SET - 2023, SET Exam - 2023,

Answer: C

The list that causes no page fault is 1020, 3012, 6120, 8100.

With 1K = 1024 words per page, the page number of an address is the integer part of address / 1024. The pages in memory are 0, 2, 5 and 7.

  • 1020 → page 0; 3012 → page 2; 6120 → page 5; 8100 → page 7. All four are resident.
  • A: 1024 is the first word of page 1, which is not resident.
  • B: 1234 is on page 1, a fault.
  • D: 2021 is on page 1 as well (page 2 starts at 2048).

Only option C keeps every reference inside a resident page.

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4.

A memory management system has 64 pages with page size of 512 bytes. Physical memory consists of 32 page frames. Number of bits required in logical and physical address are respectively :

Exam Year(s)

MH SET - 2023, SET Exam - 2023,

Answer: C

The logical and physical addresses need 15 and 14 bits.

\[ \begin{aligned} \text{logical space} &= 64 \times 512 = 2^{6} \times 2^{9} = 2^{15} \\ \text{physical space} &= 32 \times 512 = 2^{5} \times 2^{9} = 2^{14} \end{aligned} \]

So a logical address needs 15 bits (6 for the page number and 9 for the offset) and a physical address 14 bits (5 for the frame number and 9 for the offset).

Option A reverses the two. 29 and 32 come from multiplying or adding the wrong quantities rather than taking logarithms.

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Answer: A

The true statement is that segmentation allows different segments to grow independently.

Segmentation divides a program into logical units of variable length, such as code, data, heap and stack, each with its own base and size. Because each segment is separate, a growing stack or table can be enlarged on its own without disturbing the others, which suits the programmer's view of memory.

The segment table stores both a base and a limit for each segment, and the limit is checked on every access, so option B is false. Only some systems combine segmentation with paging, so 'in all systems' is wrong. And because segments have variable sizes, segmentation suffers from external fragmentation rather than eliminating it; paging is what removes it.

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6.

A computer with a 32-bit address uses two-level page table. Virtual addresses are split into a 9-bit top level page table field, an 11-bit second level page table field and an offset. How large are the pages ?

Exam Year(s)

Tripura Public Service Commission - 2026,

Answer: B

The pages are 4 KB.

The virtual address is split into the top-level index, the second-level index and the offset within the page. The offset bits fix the page size.

\[ \begin{aligned} \text{offset} &= 32 - 9 - 11 = 12\ \text{bits} \\ \text{page} &= 2^{12} = 4096\ \text{bytes} \\ &= 4\ \text{KB} \end{aligned} \]

2 KB would need an 11-bit offset and 8 KB a 13-bit offset. The trap is to use one of the table fields as the offset; 11 bits gives 2 KB.

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7.

A computer system supports 32 bit virtual address as well as 32 bit physical addresses. Since the virtual address space is of same size as that of physical address space, if we want to get rid of virtual memory, which one of the following is true ?

Exam Year(s)

UGC NET - 2012,

Answer: C

If the virtual address space is the same size as the physical address space, programs never need more memory than there is, so virtual memory can be dropped. Then the hardware that translates virtual addresses into physical ones, the memory management unit with its page tables, would not be needed for translation; this is the key's choice, option (C). Multiuser support can still be efficient, the cache does not become more efficient for this reason, and CPU scheduling is not affected by the absence of virtual memory.

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