Thyristor Characteristics and Triggering Questions and Answers

Q: A dc supply of 100 V feeds an inductance of 10 H through thyristor. The latching currents of thyristor is 80 mA. The minimum width of gate pulse so that the thyristor is triggered is __________.

The minimum gate pulse width is \(8 \times 10^{-3}\) s.With a purely inductive load, the anode current after turn-on rises linearly, \(i = \frac{V}{L}t\). The gate pulse must last until this current reaches the latching current, or the thyristor turns off when the pulse is removed.\[ \begin{aligned} t &= \frac{L\,I_{L}}{V} = \frac{10 \times 0.08}{100} \\ &= 8 \times 10^{-3}\ \text{s} = 8\ \text{ms} \end{aligned} \]80 ms comes from leaving out the factor 10 in the conversion of 80 mA to amperes, and 1 ms or 10 ms do not let the current reach 80 mA, since at 1 ms it is only 10 mA.

Q: An SCR is rated for 650 V PIV. What is the voltage up to which the device can be operated if the voltage safety factor is 2 ?

The device can be operated up to about 230 V.The voltage safety factor is the ratio of the PIV rating to the peak working voltage. With a factor of 2, the peak working voltage is half the rating, and for a sinusoidal supply the rms value is the peak divided by \(\sqrt{2}\).\[ \begin{aligned} V_{m} &= \frac{650}{2} = 325\ \text{V} \\ V_{rms} &= \frac{325}{\sqrt{2}} \approx 229.8 \approx 230\ \text{V} \end{aligned} \]325 V is the permissible peak, not the supply voltage rating, and 459 V is \(650/\sqrt{2}\), which ignores the safety factor. 650 V would leave no margin at all.

Q: The snubber is used in thyristor circuit for __________.

A snubber is used for \(\frac{dv}{dt}\) protection.A snubber is a series RC circuit connected across the thyristor. A fast-rising forward voltage can charge the junction capacitance enough to turn the thyristor on without a gate signal. The snubber capacitor slows the rate of rise of voltage across the device, and the resistor limits the discharge current when it turns on.Protection against a high \(\frac{di}{dt}\) is given by a small inductor in series with the thyristor, not by the snubber. Phase shifting and triggering are jobs of the gate firing circuit.

Q: Turn off time of an SCR in series with RL circuit can be reduced by :(a) increasing circuit resistance R(b) decreasing circuit resistance R(c) increasing circuit inductance L(d) decreasing circuit inductance L

The official key is d only (decreasing the circuit inductance L).The turn-off time of an SCR is the time the device needs, after its current has fallen to zero, to regain forward blocking. In a series RL circuit the current decays with time constant L/R, so a smaller inductance lets the current fall away faster and shortens the time before the device can start to recover. That supports (d).What could not be confirmed: the same time-constant argument would also favour a larger R (option (a), giving 'a and d'), and no textbook or reference was found that states which of the two the question intends. The key accepts only (d), so (c), increasing L, and (b), decreasing R, are both the wrong direction and are rejected, and the official key is kept.

Q: For an SCR with turn-on time of 5μs, an ideal trigger pulse should have :

The ideal pulse has a short rise time with pulse width = 6 μs.The gate pulse must last longer than the SCR's turn-on time, so that the anode current has risen above the latching current before the gate drive is removed; otherwise the SCR turns off again when the pulse ends. With a turn-on time of 5 μs, a 6 μs pulse is long enough while a 3 μs pulse is not.A short (fast) rise time makes turn-on quick and spreads conduction across the junction rapidly, reducing local heating and di/dt stress. A long rise time slows turn-on, so both 'long rise time' options are worse.

Q: Find maximum operating/switching frequency of a converter grade SCR whose turn on time and turn off time are 50 µs and 150 µs respectively.

The maximum switching frequency is 5 kHz.Each switching cycle must allow the SCR to turn on and then turn off, so the shortest possible period is the sum of the two times:\[ \begin{aligned} T_{min} &= t_{on} + t_{off} \\ &= 50 + 150 = 200\ \mu s \\ f_{max} &= \frac{1}{200\ \mu s} = 5\ \text{kHz} \end{aligned} \]20 kHz uses only the 50 µs turn-on time, about 6.7 kHz would use only the turn-off time, and 10 kHz and 2 kHz do not follow from either.

Q: For the following DIAC triggered circuit the pattern of the current trigger pulses at gate (IG) will be :

The gate current is a train of sharp pulses that decay exponentially, alternating in sign, waveform (C).In this circuit the resistor R charges the capacitor C from the AC supply. When the capacitor voltage reaches the breakover voltage of the DIAC, the DIAC suddenly conducts and the capacitor discharges through it into the gate of the triac. The gate current therefore jumps up almost instantly and then falls as the capacitor discharges through the gate resistance, which is an exponential decay. The same thing happens on the negative half-cycle with the opposite sign, because the DIAC is symmetrical.Waveform (A) is just the sine wave of the supply, with no triggering action. Waveform (B) is a smoothly rising curve with no sudden jump, which a breakover device cannot give. Waveform (D) shows a sudden rise but then a rounded fall that does not look like a capacitor discharge; C is the standard shape.

Direction for [ Question No: 1 To 1 ] :

Assertion-Reason type questions Q. 41 to 50 : The following items consist of two statements, one labelled as 'Assertion (A)' and the other labelled the 'Reason (R)'. You are to examine these two statements and decide if the Assertion (A) and the Reason (R) are individually true and if so, whether the Reason is a correct explanation of the Assertion. Select your answers to these items using the codes given below and mark your answer sheet accordingly.

Assertion (A) : Silicon controlled rectifiers are PNPN devices, having gate as controlling input.

Reason (R) : These devices do not work on avalanche breakdown principle.

A.Both (A) and (R) are true and (R) is the correct explanation of (A).
B.Both (A) and (R) are true, but (R) is not the correct explanation of (A).
C.(A) is true but (R) is false.
D.(A) is false and (R) is true.

Exam Year(s)

UGC NET - 2013,

Answer: C

The Assertion is true and the Reason is false, option (C). A silicon controlled rectifier is a four-layer PNPN device and its gate is the controlling input.

The Reason says that it does not work on the avalanche breakdown principle, which is wrong, because its turn-on involves regenerative action and, when the forward voltage is raised high enough, avalanche multiplication in the middle junction causes forward breakover. Options A and B need a true Reason, and option D a false Assertion.

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Direction for [ Question No: 2 To 2 ] :

Assertion-Reason type questions :

The following items consist of two statements, one labelled as ‘Assertion A’ and the other labelled the ‘Reason (R)’. You are to examine these two statements and decide if the Assertion (A) and the Reason (R) are individually true and if so, whether the Reason is a correct explanation of the Assertion. Select your answers to these items using the codes given below and mark your answer sheet accordingly.

Assertion (A) : A number of thyristors operating in parallel can not share a common heat sink.
Reason (R) : For simultaneous firing of the thyristor opto isolators may be employed in the gate driving circuit.
Codes :

A.Both (A) and (R) are true and (R) is the correct explanation of (A).
B.Both (A) and (R) are true, but (R) is not the correct explanation of (A).
C.(A) is true and (R) is false.
D.(A) is false and (R) is true.

Exam Year(s)

UGC NET - 2013,

Answer: D

Assertion (A) is false, since thyristors in parallel can share a common heat sink, provided that the currents are balanced. Reason (R) is true, since optical isolators (opto-isolators) are used in gate drive circuits to fire several thyristors together while keeping the control circuit isolated. So (A) is false and (R) is true.

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Direction for [ Question No: 3 To 3 ] :

Read the passage and answer the questions that follows based on your understanding of passage.

Power devices with pnpn layers such as SCR, SCS and GTO belong to thyrister series. However UJT is also a member of this group. The silicon controlled rectifier (SCR) is three terminal pnpn semiconductor switching device, which is probably most important circuit element after the diode and the transistor. An SCR can be used as a controlled switch to perform various functions such as rectification inversion and regulation of power flow. It is unidirectional power switch and being extensively used in switching ac and dc. It has capability to control power as high as 10 MW. The frequency range of its application has also been extended up to 50 kHz. SCR is a rectifier with control action. The third element called gate enables the controlled rectification gate is used to turn SCR 'ON' but not turn it 'OFF'. SCR is made of Si because it has to handle high power and high temperature.

There are many advantages of SCR as a switch i.e. the switching speed is very high up to \(10^{9}\) operation per second and it permits control over a large current (30-100 A) in the load by means of a small gate current of few mA. SCR has two states turn ON and turn OFF state. There are two ways to turn ON (i) keep the gate open and made the supply voltage equal to the breakover voltage (ii) operate SCR with supply voltage less than breakover voltage. The general methods used for turning the SCR OFF are (i) anode current interruption and (ii) force commutation. It is not advisable to turn the SCR 'ON' with zero gate signal.

Some of the applications of SCR are motor controls, relay controls, inverters, preventive circuits, regulated power supply and phase control. Another pnpn device have characteristic similar to that of SCR is SCS (Silicon Controlled Switch).

A device that can control ac power to the load during the positive and negative cycle of input is called 'triac'. It is basically a diac with a gate terminal for bilateral turn ON. Gate Turn OFF (GTO) switch is one more pnpn device which can be turned ON or OFF with cathode gate. Some application of GTO are counters, pulse generators and multivibrators.

Light activated SCR (SASCR) is turned ON by the light falling on the gate. It is used as a relay, optical light controller, phase controller and motor control device.

If the applied voltage is increased further when an SCR is forward biased, then

A.It becomes more forward biased.
B.It becomes more reverse biased.
C.It will come to 'ON' state.
D.It will come to 'OFF' state.

Exam Year(s)

UGC NET - 2013,

Answer: C

The SCR will come to the ON state, which is option (C). When an SCR is forward biased with the gate open and the supply voltage is raised, it stays off until the voltage reaches the forward breakover voltage, where avalanche multiplication drives it into conduction. The passage says that one way to turn it on is to make the supply voltage equal to the breakover voltage. It does not become more forward biased in any useful sense (A), is not reverse biased by a forward voltage (B), and does not turn off (D).

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A dc supply of 100 V feeds an inductance of 10 H through thyristor. The latching currents of thyristor is 80 mA. The minimum width of gate pulse so that the thyristor is triggered is __________.

A.\(8 \times 10^{-3}\) s
B.\(10 \times 10^{-3}\) s
C.\(1 \times 10^{-3}\) s
D.\(80 \times 10^{-3}\) s

Exam Year(s)

RSMSSB JE - 2025, RSMSSB - 2025,

Answer: A

The minimum gate pulse width is \(8 \times 10^{-3}\) s.

With a purely inductive load, the anode current after turn-on rises linearly, \(i = \frac{V}{L}t\). The gate pulse must last until this current reaches the latching current, or the thyristor turns off when the pulse is removed.

\[ \begin{aligned} t &= \frac{L\,I_{L}}{V} = \frac{10 \times 0.08}{100} \\ &= 8 \times 10^{-3}\ \text{s} = 8\ \text{ms} \end{aligned} \]

80 ms comes from leaving out the factor 10 in the conversion of 80 mA to amperes, and 1 ms or 10 ms do not let the current reach 80 mA, since at 1 ms it is only 10 mA.

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An SCR is rated for 650 V PIV. What is the voltage up to which the device can be operated if the voltage safety factor is 2 ?

A.230 V
B.459 V
C.650 V
D.325 V

Exam Year(s)

RSMSSB JE - 2025, RSMSSB - 2025,

Answer: A

The device can be operated up to about 230 V.

The voltage safety factor is the ratio of the PIV rating to the peak working voltage. With a factor of 2, the peak working voltage is half the rating, and for a sinusoidal supply the rms value is the peak divided by \(\sqrt{2}\).

\[ \begin{aligned} V_{m} &= \frac{650}{2} = 325\ \text{V} \\ V_{rms} &= \frac{325}{\sqrt{2}} \approx 229.8 \approx 230\ \text{V} \end{aligned} \]

325 V is the permissible peak, not the supply voltage rating, and 459 V is \(650/\sqrt{2}\), which ignores the safety factor. 650 V would leave no margin at all.

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The snubber is used in thyristor circuit for __________.

A.\(\frac{dv}{dt}\) protection
B.\(\frac{di}{dt}\) protection
C.Phase shifting
D.Triggering

Exam Year(s)

RSMSSB JE - 2025, RSMSSB - 2025,

Answer: A

A snubber is used for \(\frac{dv}{dt}\) protection.

A snubber is a series RC circuit connected across the thyristor. A fast-rising forward voltage can charge the junction capacitance enough to turn the thyristor on without a gate signal. The snubber capacitor slows the rate of rise of voltage across the device, and the resistor limits the discharge current when it turns on.

Protection against a high \(\frac{di}{dt}\) is given by a small inductor in series with the thyristor, not by the snubber. Phase shifting and triggering are jobs of the gate firing circuit.

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Turn off time of an SCR in series with RL circuit can be reduced by :

(a) increasing circuit resistance R
(b) decreasing circuit resistance R
(c) increasing circuit inductance L
(d) decreasing circuit inductance L

A.b and d
B.a and d
C.b and c
D.d only

Exam Year(s)

MH SET - 2018, SET Exam - 2018,

Answer: D

The official key is d only (decreasing the circuit inductance L).

The turn-off time of an SCR is the time the device needs, after its current has fallen to zero, to regain forward blocking. In a series RL circuit the current decays with time constant L/R, so a smaller inductance lets the current fall away faster and shortens the time before the device can start to recover. That supports (d).

What could not be confirmed: the same time-constant argument would also favour a larger R (option (a), giving 'a and d'), and no textbook or reference was found that states which of the two the question intends. The key accepts only (d), so (c), increasing L, and (b), decreasing R, are both the wrong direction and are rejected, and the official key is kept.

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For an SCR with turn-on time of 5μs, an ideal trigger pulse should have :

A.Short rise time with pulse width = 3 μs
B.Long rise time with pulse width = 6 μs
C.Short rise time with pulse width = 6 μs
D.Long rise time with pulse width = 3 μs

Exam Year(s)

MH SET - 2018, SET Exam - 2018,

Answer: C

The ideal pulse has a short rise time with pulse width = 6 μs.

The gate pulse must last longer than the SCR's turn-on time, so that the anode current has risen above the latching current before the gate drive is removed; otherwise the SCR turns off again when the pulse ends. With a turn-on time of 5 μs, a 6 μs pulse is long enough while a 3 μs pulse is not.

A short (fast) rise time makes turn-on quick and spreads conduction across the junction rapidly, reducing local heating and di/dt stress. A long rise time slows turn-on, so both 'long rise time' options are worse.

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Find maximum operating/switching frequency of a converter grade SCR whose turn on time and turn off time are 50 µs and 150 µs respectively.

A.20 kHz
B.10 kHz
C.5 kHz
D.2 kHz

Exam Year(s)

MH SET - 2019, SET Exam - 2019,

Answer: C

The maximum switching frequency is 5 kHz.

Each switching cycle must allow the SCR to turn on and then turn off, so the shortest possible period is the sum of the two times:

\[ \begin{aligned} T_{min} &= t_{on} + t_{off} \\ &= 50 + 150 = 200\ \mu s \\ f_{max} &= \frac{1}{200\ \mu s} = 5\ \text{kHz} \end{aligned} \]

20 kHz uses only the 50 µs turn-on time, about 6.7 kHz would use only the turn-off time, and 10 kHz and 2 kHz do not follow from either.

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10.

For the following DIAC triggered circuit the pattern of the current trigger pulses at gate (I_G) will be :

DIAC triggered triac circuit with an R-C network and the gate current IG marked

Exam Year(s)

MH SET - 2019, SET Exam - 2019,

Answer: C

The gate current is a train of sharp pulses that decay exponentially, alternating in sign, waveform (C).

In this circuit the resistor R charges the capacitor C from the AC supply. When the capacitor voltage reaches the breakover voltage of the DIAC, the DIAC suddenly conducts and the capacitor discharges through it into the gate of the triac. The gate current therefore jumps up almost instantly and then falls as the capacitor discharges through the gate resistance, which is an exponential decay. The same thing happens on the negative half-cycle with the opposite sign, because the DIAC is symmetrical.

Waveform (A) is just the sine wave of the supply, with no triggering action. Waveform (B) is a smoothly rising curve with no sudden jump, which a breakover device cannot give. Waveform (D) shows a sudden rise but then a rounded fall that does not look like a capacitor discharge; C is the standard shape.

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Thyristor Characteristics and Triggering Questions and Answers

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