Logic Gates Questions and Answers

Answer: C

Correct answer: If one input to a 2-input AND gate is HIGH, the output reflects the other input

Holding one AND input HIGH makes the output follow the other input exactly, which is how an AND gate is used as an enable. An AND gate may have more than two inputs but has only one output, and two inputs give four combinations, not eight.

Answer: C

Correct answer: At least one input must be LOW.

AND gives 0 whenever any input is 0. That covers seven of the eight input combinations, so the condition is at least one LOW rather than all of them.

Answer: B

Correct answer: gives an output when all input signals are present simultaneously

An AND gate outputs 1 only when every input is 1 at the same instant. It holds no state, so it is not a memory circuit, and it is a negative-logic OR rather than a negative OR in the sense of the option offered.

Answer: B

Correct answer: Two

A function table records electrical levels only. Assigning HIGH to 1 and LOW to 0 gives the positive-logic truth table; assigning them the other way round gives the negative-logic one. So each function table yields exactly two truth tables.

Answer: D

Correct answer: 1023

Building a \(2^n\) input multiplexer from two-input multiplexers gives a binary tree: \(2^{n-1}\) at the first level, \(2^{n-2}\) at the next, and so on down to one. The total is

\[ 2^{9}+2^{8}+\cdots+2^{0}=2^{10}-1=1023 \]

Answer: D

Correct answer: XOR

XNOR is by definition the complement of XOR, so an XOR followed by an inverter produces it. It is 1 when its inputs agree, which is why it also serves as an equality detector.

Answer: D

Correct answer: AND

The AND gate outputs 1 only for the single input combination in which every input is 1. NAND is its complement, giving 0 only in that case, while OR needs just one HIGH input.

Answer: D

Correct answer: 5-volt supply

TTL is specified for a nominal 5 V supply, with LOW below about 0.8 V and HIGH above about 2 V.

Answer: B

Correct answer: 1 half-adder, 15 full-adders

The least significant bit has no carry coming into it, so a half adder suffices there; each of the remaining fifteen bits must add three quantities - two bits and a carry - which needs a full adder. In general an n-bit ripple adder takes one half adder and \( n-1 \) full adders.

Answer: D

Correct answer: unit loads

Fan-out is expressed as the number of standard gate inputs, or unit loads, that one output can drive. It is a current limit underneath, but stating it in unit loads makes it directly usable when connecting gates of the same family.