Logic Gates Questions and Answers

Q: In the following question, match each of the items A, B and C on the left with an approximation item on the right A. Shift register can be used 1. for code conversion B. A multiplexer can be used 2. to generate memory slipto select C. A decoder can be used 3. for parallel to serial conversion 4. as many to one switch &n

Correct answer: A B C 3 4 1A shift register moves bits along one place per clock, which converts a parallel word into a serial stream, so A goes with 3. A multiplexer connects one of many inputs to a single output, which is a many-to-one switch, so B goes with 4. A decoder turns a binary code into an activated line, which is a form of code conversion, so C goes with 1.

Q: An OR gate output is HIGH only if all the inputs are HIGH.

Correct answer: FalseAn OR output is HIGH if any input is HIGH. Requiring all of them is the AND condition.

Q: What logic function is produced by adding an inverter to the output of an AND gate ?

Correct answer: NANDNAND means NOT-AND, so inverting the output of an AND gate is exactly how it is formed.

Q: A comparison between serial and parallel adder reveals that serial order

Correct answer: is slowerA serial adder handles one bit pair per clock, so an n-bit addition takes n clock periods. A parallel adder presents all bits at once and completes in a single propagation delay. The serial adder is simpler and smaller, which is the trade it makes.

Q: A toggle operation cannot be performed using a single

Correct answer: AND gateToggling means inverting, and inversion requires a gate that can produce a complement. NAND, NOR and XOR can each be wired to invert - tie the inputs together, or hold one XOR input at 1 - but an AND gate with its inputs tied together simply reproduces the input, so it can never toggle.

Q: Odd parity of a word can be conveniently tested by

Correct answer: XOR gateAn XOR gate outputs 1 when an odd number of its inputs are 1, which is exactly what a parity test asks. Chaining XOR gates over a word therefore gives 1 for odd parity and 0 for even. AND, OR and NOR have no such property.

Q: The output of a NAND gate is LOW if ________.

Correct answer: all inputs are HIGHNAND is the complement of AND, and AND is 1 only when every input is 1. So NAND is 0 in exactly that case and 1 in all the others.

Q: How many full adders are required to construct an m-bit parallel adder ?

Correct answer: m-1In an m-bit ripple carry adder the lowest bit has no incoming carry and needs only a half adder; the other \( m-1 \) bits each add two bits and a carry, which is the full adder's job.

Q: One advantage TTL has over CMOS is that TTL is ________.

Correct answer: not sensitive to electrostatic dischargeCMOS inputs are insulated gates that a static discharge can puncture, so the devices need careful handling; TTL inputs are transistor junctions and are far more robust. On the other three counts CMOS now matches or beats TTL.

Q: A logic gate has one or more output terminals and one input terminal.

Correct answer: FalseThe statement is inverted. A logic gate has one or more inputs and a single output.

121.

In the following question, match each of the items A, B and C on the left with an approximation item on the right

A. Shift register can be used 1. for code conversion

B. A multiplexer can be used 2. to generate memory slipto select

C. A decoder can be used 3. for parallel to serial conversion

4. as many to one switch

A.A B C1 2 3
B.A B C3 4 1
C.A B C5 4 2
D.A B C1 3 5

Answer: B

Correct answer: A B C 3 4 1

A shift register moves bits along one place per clock, which converts a parallel word into a serial stream, so A goes with 3. A multiplexer connects one of many inputs to a single output, which is a many-to-one switch, so B goes with 4. A decoder turns a binary code into an activated line, which is a form of code conversion, so C goes with 1.

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122.

An OR gate output is HIGH only if all the inputs are HIGH.

A.True
B.False

Answer: B

Correct answer: False

An OR output is HIGH if any input is HIGH. Requiring all of them is the AND condition.

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123.

What logic function is produced by adding an inverter to the output of an AND gate ?

A.NAND
B.NOR
C.XOR
D.OR

Answer: A

Correct answer: NAND

NAND means NOT-AND, so inverting the output of an AND gate is exactly how it is formed.

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124.

A comparison between serial and parallel adder reveals that serial order

A.is slower
B.is faster
C.operates at the same speed as parallel adder
D.is more complicated

Answer: A

Correct answer: is slower

A serial adder handles one bit pair per clock, so an n-bit addition takes n clock periods. A parallel adder presents all bits at once and completes in a single propagation delay. The serial adder is simpler and smaller, which is the trade it makes.

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125.

A toggle operation cannot be performed using a single

A.NOR gate
B.AND gate
C.NAND gate
D.XOR gate

Answer: B

Correct answer: AND gate

Toggling means inverting, and inversion requires a gate that can produce a complement. NAND, NOR and XOR can each be wired to invert - tie the inputs together, or hold one XOR input at 1 - but an AND gate with its inputs tied together simply reproduces the input, so it can never toggle.

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126.

Odd parity of a word can be conveniently tested by

A.OR gate
B.AND gate
C.NOR gate
D.XOR gate

Answer: D

Correct answer: XOR gate

An XOR gate outputs 1 when an odd number of its inputs are 1, which is exactly what a parity test asks. Chaining XOR gates over a word therefore gives 1 for odd parity and 0 for even. AND, OR and NOR have no such property.

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127.

The output of a NAND gate is LOW if ________.

A.all inputs are LOW
B.all inputs are HIGH
C.any input is LOW
D.any input is HIGH

Answer: B

Correct answer: all inputs are HIGH

NAND is the complement of AND, and AND is 1 only when every input is 1. So NAND is 0 in exactly that case and 1 in all the others.

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128.

How many full adders are required to construct an m-bit parallel adder ?

A.m/2
B.m-1
C.m
D.m+1

Answer: B

Correct answer: m-1

In an m-bit ripple carry adder the lowest bit has no incoming carry and needs only a half adder; the other \( m-1 \) bits each add two bits and a carry, which is the full adder's job.

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129.

One advantage TTL has over CMOS is that TTL is ________.

A.less expensive
B.not sensitive to electrostatic discharge
C.faster
D.more widely available

Answer: B

Correct answer: not sensitive to electrostatic discharge

CMOS inputs are insulated gates that a static discharge can puncture, so the devices need careful handling; TTL inputs are transistor junctions and are far more robust. On the other three counts CMOS now matches or beats TTL.

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130.

A logic gate has one or more output terminals and one input terminal.

A.True
B.False

Answer: B

Correct answer: False

The statement is inverted. A logic gate has one or more inputs and a single output.

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