Computer Network Questions and Answers

Answer: D

Correct answer: all of above

Broadband means a channel of wide bandwidth, and coaxial cable, optical fibre and microwave links all qualify - each carries far more than a single voice channel.

Answer: B

Correct answer: 6 kbps

Nyquist again, with two levels:

\[ C = 2B\log_{2}2 = 2\times 3000 = 6000\ \text{bps} \]

Answer: D

Correct answer: 13

Each position carries a power of two: \(1101_2 = 8 + 4 + 0 + 1 = 13\). The zero in the twos place is what separates it from 1111, which would be 15.

Answer: C

Correct answer: NOT

The NOT gate is the inverter. It has a single input and a single output, and the output is always the complement of the input: 0 becomes 1 and 1 becomes 0. Its Boolean expression is \( Y = \bar{A} \). On a circuit diagram it is drawn as a triangle with a small circle, or bubble, at its output. That bubble is the general symbol for inversion, which is why a NAND gate is drawn as an AND gate with a bubble and a NOR gate as an OR gate with one. The NOT gate is the only basic gate with one input; AND, OR, NAND, NOR and XOR all take two or more. It is easily built from a universal gate: tying both inputs of a NAND or a NOR together produces an inverter, which is part of what makes those gates universal. Two inverters in series cancel, giving \( \bar{\bar{A}} = A \) - the involution law of Boolean algebra.

Answer: B

Correct answer: 13%

Of every 8-bit sample T1 devotes 1 bit to signalling, and each 193-bit frame adds a framing bit:

\[ \frac{1}{8} = 12.5\% \quad\text{plus}\quad \frac{1}{193} \approx 0.5\% \]

which together come to about 13 per cent.

Answer: B

Correct answer: (A · B)’ = A’ + B’

De Morgan’s second theorem states that the complement of a product equals the sum of the complements: (A · B)’ = A’ + B’. In gate terms, a NAND is the same as an OR gate fed by inverted inputs.

Answer: A

Correct answer: 1024.5 sec

In packet switching the message is divided into packets which travel one behind another, so the pipeline is full after the first packet reaches the far end and the remaining packets follow at the transmission rate. Adding the propagation over the hops to the transmission of all the packets gives about 1024.5 s - very close to the circuit-switched figure, because the message is large enough for transmission time to dominate both.

Answer: D

Correct answer: XOR

A half adder adds two single bits and produces two outputs. The SUM is generated by an XOR gate and the CARRY by an AND gate: \[ S = A \oplus B, \qquad C = A \cdot B. \] The reason is visible in the arithmetic. 0+0 gives sum 0; 0+1 and 1+0 give sum 1; and 1+1 gives sum 0 with a carry of 1. The sum column is 1 exactly when the inputs differ, which is the definition of XOR, and the carry column is 1 only when both are 1, which is AND. The half adder cannot accept a carry from a previous stage, which is why a full adder is needed for multi-bit addition. A full adder takes three inputs and can be built from two half adders and an OR gate. Chaining full adders gives a ripple-carry adder, simple but slow because each stage waits for the carry from the one below; carry-lookahead adders exist to remove that delay.

Answer: D

Correct answer: 11010100

The 2’s complement is formed by inverting every bit and adding 1. Starting from 00101100, inversion gives 11010011, and adding 1 gives 11010100. Note that 11010011 - the second option - is the 1’s complement, which is the classic trap. A quicker method for hand working: copy the bits from the right up to and including the first 1, then invert everything to the left of it. Here the rightmost 1 is in the third position, so 100 is copied and 00101 becomes 11010, giving the same answer. 2’s complement is the standard representation for signed integers because it makes subtraction identical to addition - the processor needs no separate subtractor - and because it has only one representation of zero, unlike 1’s complement and sign-magnitude, which have two. In eight bits it represents the range −128 to +127, the asymmetry arising from that single zero.

Answer: C

Correct answer: 30,000 bps

Shannon's formula applies, with 30 dB meaning a power ratio of 1000:

\[ C = B\log_{2}\!\left(1+\frac{S}{N}\right) = 3000\log_{2}(1001) \approx 3000\times 9.97 \approx 30{,}000\ \text{bps} \]