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Counters Questions and Answers

11.

The tpd for each flip-flop is 50ns, determine the maximum operating frequency for MOD-32 ripple counter :

Exam Year(s)

MH SET - 2021, SET Exam - 2021,

Answer: A

The maximum operating frequency is 4 MHz.

A MOD-32 counter needs 5 flip-flops, since \(2^5 = 32\). In a ripple counter each flip-flop is clocked by the one before it, so in the worst case the delays add up before the count settles:

\[ \begin{aligned} t_{total} &= 5 \times 50\ \text{ns} = 250\ \text{ns} \\ f_{max} &= \frac{1}{250\ \text{ns}} = 4\ \text{MHz} \end{aligned} \]

4 GHz is the same digits with the wrong prefix. 3 MHz and 2 MHz match no sensible count of flip-flops: 2 MHz would need ten flip-flops' delay, which is a MOD-1024 counter.

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12.

Output frequency in the following diagram will be :

A 1,31,072 Hz crystal drives a crystal oscillator, whose output feeds a 14-stage binary divider giving the output fo.

Exam Year(s)

MH SET - 2021, SET Exam - 2021,

Answer: D

The output frequency is 8 Hz.

Each stage of a binary divider (one flip-flop) halves the frequency, so 14 stages divide by \(2^{14}\):

\[ \begin{aligned} 2^{14} &= 16384 \\ f_{o} &= \frac{131072}{16384} = 8\ \text{Hz} \end{aligned} \]

131072 is \(2^{17}\), so the result is \(2^{3}\) exactly. 1 kHz or 100 Hz would need a decimal (divide-by-10) chain, and 13 Hz does not come from dividing by any power of two.

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