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Logic Gates Questions and Answers

61.

An exclusive-OR gate output is HIGH when the inputs are unequal.

Answer: A

Correct answer: True

XOR is the inequality detector: its output is HIGH exactly when its two inputs differ.

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Answer: D

Correct answer: Both (a) & (b)

XOR is its own inverse, so an equation may be rearranged freely: from \( A\oplus B=C \), XOR both sides with \(B\) to get \( A = B\oplus C \), or with \(A\) to get \( B = A\oplus C \). Both rearrangements hold, which is why the third option - \( A\oplus B\oplus C = 0 \) - is also true but is not the only one.

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63.

How many inputs are on the logic gates of a 74HC21 IC?

Answer: D

Correct answer: 4

The 74HC21 is a dual four-input AND gate: two gates of four inputs each, which fits a 14-pin package with two pins to spare for supply and ground.

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65.

Extremely low power dissipation and low cost per gate can be achieved in:

Answer: B

Correct answer: C MOS ICs

CMOS draws current essentially only while switching, so its static power dissipation is negligible - far below TTL or ECL - and its simple structure gives a low cost per gate. That combination is why CMOS displaced the other families.

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66.

How many entries would a truth table for a four-input NAND gate have?

Answer: C

Correct answer: 16

The number of rows depends only on the number of inputs, not on the function: \( 2^4 = 16 \) for any four-input gate.

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67.

Which one of the following will give the sum of full adders as output ?

Answer: D

Correct answer: Three bit parity checker

The sum output of a full adder is \( A \oplus B \oplus C_{in} \) - it is 1 whenever an odd number of the three inputs is 1. That is precisely what a three-bit parity checker computes. The carry output, by contrast, is the majority function of the same three bits.

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70.

Which of the following gates has the exact inverse output of the OR gate for all possible input combinations?

Answer: A

Correct answer: NOR

NOR is the complement of OR by definition, so its output is the exact inverse of the OR output for every input combination. NAND inverts AND, not OR, and a NOT gate takes only one input.

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