Computer Network Questions and Answers

Answer: A

Correct answer: 1024.5 sec

In packet switching the message is divided into packets which travel one behind another, so the pipeline is full after the first packet reaches the far end and the remaining packets follow at the transmission rate. Adding the propagation over the hops to the transmission of all the packets gives about 1024.5 s - very close to the circuit-switched figure, because the message is large enough for transmission time to dominate both.

Answer: D

Correct answer: XOR

A half adder adds two single bits and produces two outputs. The SUM is generated by an XOR gate and the CARRY by an AND gate: \[ S = A \oplus B, \qquad C = A \cdot B. \] The reason is visible in the arithmetic. 0+0 gives sum 0; 0+1 and 1+0 give sum 1; and 1+1 gives sum 0 with a carry of 1. The sum column is 1 exactly when the inputs differ, which is the definition of XOR, and the carry column is 1 only when both are 1, which is AND. The half adder cannot accept a carry from a previous stage, which is why a full adder is needed for multi-bit addition. A full adder takes three inputs and can be built from two half adders and an OR gate. Chaining full adders gives a ripple-carry adder, simple but slow because each stage waits for the carry from the one below; carry-lookahead adders exist to remove that delay.

Answer: D

Correct answer: 11010100

The 2’s complement is formed by inverting every bit and adding 1. Starting from 00101100, inversion gives 11010011, and adding 1 gives 11010100. Note that 11010011 - the second option - is the 1’s complement, which is the classic trap. A quicker method for hand working: copy the bits from the right up to and including the first 1, then invert everything to the left of it. Here the rightmost 1 is in the third position, so 100 is copied and 00101 becomes 11010, giving the same answer. 2’s complement is the standard representation for signed integers because it makes subtraction identical to addition - the processor needs no separate subtractor - and because it has only one representation of zero, unlike 1’s complement and sign-magnitude, which have two. In eight bits it represents the range −128 to +127, the asymmetry arising from that single zero.

Answer: C

Correct answer: 30,000 bps

Shannon's formula applies, with 30 dB meaning a power ratio of 1000:

\[ C = B\log_{2}\!\left(1+\frac{S}{N}\right) = 3000\log_{2}(1001) \approx 3000\times 9.97 \approx 30{,}000\ \text{bps} \]

Answer: C

Correct answer: 15

With n bits for sequence numbers a go-back-N window may be at most \( 2^{n}-1 \), one less than the number of distinct sequence numbers, so that a full window can never be mistaken for an empty one:

\[ 2^{4}-1 = 15 \]

Answer: C

Correct answer: Four

Binary Coded Decimal stores each decimal digit in its own group of four bits, so 27 becomes 0010 0111. The six combinations from 1010 to 1111 are unused, which makes BCD less compact than pure binary.

Answer: D

Correct answer: 3

A full adder has three inputs - the two bits to be added and a carry-in from the previous stage - and two outputs, the sum and the carry-out. The carry-in is what distinguishes it from a half adder, which has only two inputs and cannot be used beyond the least significant bit of a multi-bit addition. Its Boolean expressions are \[ S = A \oplus B \oplus C_{in}, \qquad C_{out} = AB + C_{in}(A \oplus B), \] and it can be built from two half adders and an OR gate. The sum output is 1 when an odd number of the three inputs is 1, which is why it is a cascade of XOR gates; the carry is 1 when at least two of the three are. Chaining \( n \) full adders gives a ripple-carry adder for \( n \)-bit numbers, simple but slow because each stage waits for the carry below it. Carry-lookahead adders compute the carries in parallel to remove that delay.

Answer: A

Correct answer: within each user session

An adaptive routing table is rebuilt as conditions change - as links fail or queues lengthen - so it may well change several times during one session. A table fixed at system generation is static routing.

Answer: B

Correct answer: 15

Octal is base 8, so each digit carries a place value that is a power of eight. For 17 that gives \[ 1 \times 8 + 7 = 15. \] The trap is reading the numeral as though it were decimal, which is why 17 is offered as a distractor. Octal uses only the digits 0 to 7; the digits 8 and 9 do not exist in it, so a numeral containing either is not a valid octal number at all - a quick way to spot a bad option. Octal is used as shorthand for binary because each octal digit corresponds to exactly three bits: 1 is 001 and 7 is 111, so 17 in octal is 001111, which is 15. Conversion is done by grouping bits in threes from the right, with no arithmetic. It was common on machines with word lengths divisible by three, and survives in Unix file permissions, where 755 and 644 are octal.

Answer: D

Correct answer: 10

With \( n \) address lines a processor can select \( 2^{n} \) distinct locations. Since 1 KB in the binary sense is 1,024 bytes, \[ 2^{n} = 1024 \quad\Rightarrow\quad n = 10. \] The powers of two are worth having by heart for this family of questions: \( 2^{10} = 1\text{K} \), \( 2^{20} = 1\text{M} \), \( 2^{30} = 1\text{G} \). So 1 MB needs 20 address lines and 4 GB needs 32 - which is precisely why a 32-bit processor can address no more than 4 GB without extensions. The distractor 1024 confuses the number of locations with the number of lines needed to select among them. The width of the data bus is a separate matter: it determines how many bits are transferred at once, not how many locations exist. A memory of 1K × 8 has ten address lines and eight data lines.