Memory Devices Questions and Answers

Q: A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 16K × 16 RAM from 1K × 8 RAM is

The number of decoders is 5.A 16K × 16 memory built from 1K × 8 chips needs 16 rows of chips (16K / 1K), with two chips side by side in each row for the 16-bit word. Selecting one of the 16 rows needs a 4-to-16 decoder.A 4-to-16 decoder is built from 2 × 4 decoders with enable lines: one decoder takes the top two address bits and enables one of four second-level decoders, which decode the next two bits. That is \(1 + 4 = 5\) decoders.4 forgets the first-level decoder, and 6 or 7 count extra decoders that are not needed.

Q: 1 K memory device contain

A 1 K memory device contains 1024 memory cells.In memory sizes K stands for 210, which is 1024, not exactly 1000.1064 and 640 are not powers of two, and 512 is half of 1024, which would be 0.5 K.The same rule gives 1 M as 1,048,576, which is 220. Memory is addressed with binary lines, so a device with ten address lines selects one of 210 = 1024 locations, and that is why the size is always counted in powers of two.

Q: Out of the following memory types, one that is volatile is

The volatile memory among the options is semiconductor RAM.A volatile memory loses what it holds when power is removed. Semiconductor RAM stores each bit as charge or in a flip-flop and needs continuous power.Magnetic discs and ferrite cores hold their magnetisation without power, and semiconductor ROM keeps its contents permanently, so they are all non-volatile.That is why RAM is used for working data while programs that must survive power-off are kept in ROM or on disc. Dynamic RAM also needs periodic refreshing of the stored charge, while static RAM holds its state as long as the supply stays on.

11.

A RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2 × 4 decoders with enable line needed to construct a 16K × 16 RAM from 1K × 8 RAM is

Exam Year(s)

Tripura Public Service Commission - 2025,

Answer: B

The number of decoders is 5.

A 16K × 16 memory built from 1K × 8 chips needs 16 rows of chips (16K / 1K), with two chips side by side in each row for the 16-bit word. Selecting one of the 16 rows needs a 4-to-16 decoder.

A 4-to-16 decoder is built from 2 × 4 decoders with enable lines: one decoder takes the top two address bits and enables one of four second-level decoders, which decode the next two bits. That is \(1 + 4 = 5\) decoders.

4 forgets the first-level decoder, and 6 or 7 count extra decoders that are not needed.

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12.

List - I	List - II
(a) Semi-conductor memory	(i) Destructive read out
(b) Ferrite core memory	(ii) Combinational logic
(c) Magnetic tape memory	(iii) Non-volatile
(d) Flash memory	(iv) EEPROM

Codes :
(a) (b) (c) (d)

A.(ii) (i) (iii) (iv)
B.(i) (ii) (iv) (iii)
C.(ii) (iii) (i) (iv)
D.(iv) (ii) (i) (iii)

Exam Year(s)

UGC NET - 2012,

Answer: A

The keyed code A is (ii) (i) (iii) (iv): semiconductor memory is paired with combinational logic (ii), ferrite core memory with destructive read out (i), because reading a core resets it and it must be rewritten, magnetic tape memory with non-volatile storage (iii), and flash memory with EEPROM (iv), since flash is an electrically erasable form of EEPROM. Options B, C and D pair ferrite core memory with something other than destructive read out, which is its best-known property.

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Direction for [ Question No: 13 To 13 ] :

Directions : Q. Nos. 21 to 30 : The following items consist of two statements, one labelled the “Assertion (A)” and the other labelled the “Reason (R)”. You are to examine these two statements carefully and decide if the Assertion (A) and the Reason (R) are individually true and if so, whether the Reason is a correct explanation of the Assertion. Select your answers to these items using the codes given below and mark your answer accordingly.

13.

Assertion (A) : A programmable Read-Only-Memory can be used as a synchronous counter.

Reason (R) : Each memory location of a programmable Read-Only-Memory is programmed and can be read synchronously.

A.Both (A) and (R) are true and (R) is the correct explanation of (A).
B.Both (A) and (R) are true, but (R) is not correct explanation of (A).
C.(A) is true, but (R) is false.
D.(A) is false, but (R) is true.

Exam Year(s)

UGC NET - 2012,

Answer: C

The keyed answer is (A) true and (R) false. A programmable ROM can serve as a synchronous counter, because its output word can be fed back as the next address (through a register clocked together), and the stored contents then define the count sequence, so (A) is accepted. The reason is not accepted by the key: a PROM is programmed once, and the statement that each location can be read synchronously does not explain how it counts. The keyed option is C, and the options calling (A) false or (R) a valid explanation are wrong.

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Direction for [ Question No: 14 To 14 ] :

Directions : The following items consist of two statements, one labelled the "Assertion" (A) and other labelled the "Reason" (R). You are to examine these two statements carefully and decide if the Assertion (A) and the Reason (R) are individually true and if so, whether the Reason is a correct explanation of the Assertion. Select your answers to these items using the codes given below and mark your answer accordingly.

14.

Assertion (A) : The contents of Random Access memory is a volatile in nature. As soon as the power is removed to the IC, the contents are erased from the memory.

Reason (R) : The contents of Read-only Memory is a non-volatile in nature.

A.Both (A) and (R) are true and (R) is the correct explanation of (A).
B.Both (A) and (R) are true, but (R) is not the correct explanation of (A).
C.(A) is true, but (R) is false.
D.(A) is false, but (R) is true.

Exam Year(s)

UGC NET - 2013,

Answer: B

Both statements are true but the reason does not explain the assertion, which is option (B). RAM is volatile, so its contents are lost as soon as power is removed. ROM is non-volatile and retains its contents. That ROM keeps its data says nothing about why RAM loses it, since RAM's volatility comes from storing bits in flip-flops or charged capacitors that need power. Option (A) wrongly links the two, and (C) and (D) deny a true statement.

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15.

1 K memory device contain

A.1064 memory cells
B.1024 memory cells
C.512 memory cells
D.640 memory cells

Exam Year(s)

UGC NET - 2013,

Answer: B

A 1 K memory device contains 1024 memory cells.

In memory sizes K stands for 2¹⁰, which is 1024, not exactly 1000.

1064 and 640 are not powers of two, and 512 is half of 1024, which would be 0.5 K.

The same rule gives 1 M as 1,048,576, which is 2²⁰. Memory is addressed with binary lines, so a device with ten address lines selects one of 2¹⁰ = 1024 locations, and that is why the size is always counted in powers of two.

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16.

Out of the following memory types, one that is volatile is

A.magnetic disc
B.ferrite core
C.semiconductor ROM
D.semiconductor RAM

Exam Year(s)

UGC NET - 2013,

Answer: D

The volatile memory among the options is semiconductor RAM.

A volatile memory loses what it holds when power is removed. Semiconductor RAM stores each bit as charge or in a flip-flop and needs continuous power.

Magnetic discs and ferrite cores hold their magnetisation without power, and semiconductor ROM keeps its contents permanently, so they are all non-volatile.

That is why RAM is used for working data while programs that must survive power-off are kept in ROM or on disc. Dynamic RAM also needs periodic refreshing of the stored charge, while static RAM holds its state as long as the supply stays on.

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Direction for [ Question No: 17 To 17 ] :

Assertion - Reason type questions : The following items consist of two statements, one labelled the 'Assertion (A)' and the other labelled the 'Reason (R)'. You are to examine these two statements and decide if the Assertion (A) and the Reason (R) are individually true and if so, whether the Reason is a correct explanation of the Assertion. Select your answers to these items using the codes given below and mark your answer sheet accordingly.

17.

Assertion (A) : A programmable Read-Only-Memory can be used as a synchronous counter.
Reason (R) : Each memory location of a programmable Read-Only-Memory is programmed and can be read synchronously.

A.Both (A) and (R) are true and (R) is the correct explanation of (A).
B.Both (A) and (R) are true, but (R) is not the correct explanation of (A).
C.(A) is true and (R) is false.
D.(A) is false and (R) is true.

Exam Year(s)

UGC NET - 2013,

Answer: C

A PROM can store the next-state table of a counter, with the present state as the address and the next state as the stored word, so that the outputs fed back through a register give a counter; so (A) is true. The official key marks (R) as false, as each location of a PROM is programmed once, but the data is read asynchronously, without a clock. The answer is (A) is true and (R) is false.

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18.

A given memory chip has 14 address pins and 8 data pins. It has the following number of locations.

A.\(2^{8}\)
B.\(2^{14}\)
C.\(2^{6}\)
D.\(2^{12}\)

Exam Year(s)

UGC NET - 2013,

Answer: B

A chip with 14 address pins has \(2^{14}\) locations, since each address line doubles the number of locations that can be selected.

\[ \text{locations} = 2^{14} = 16384 \]

The 8 data pins give the width of each location, 8 bits, and have no effect on the count. So \(2^{8}\) confuses the data pins with the address pins, and \(2^{6}\) and \(2^{12}\) do not correspond to 14 address lines.

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Memory Devices Questions and Answers

Direction for [ Question No: 13 To 13 ] :

Direction for [ Question No: 14 To 14 ] :

Direction for [ Question No: 17 To 17 ] :

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