An OR gate output is HIGH only if all the inputs are HIGH.
Answer: B
Correct answer: False
An OR output is HIGH if any input is HIGH. Requiring all of them is the AND condition.
Please log in or register to report this question.
An OR gate output is HIGH only if all the inputs are HIGH.
Answer: B
Correct answer: False
An OR output is HIGH if any input is HIGH. Requiring all of them is the AND condition.
Please log in or register to report this question.
What logic function is produced by adding an inverter to the output of an AND gate ?
Answer: A
Correct answer: NAND
NAND means NOT-AND, so inverting the output of an AND gate is exactly how it is formed.
Please log in or register to report this question.
A comparison between serial and parallel adder reveals that serial order
Answer: A
Correct answer: is slower
A serial adder handles one bit pair per clock, so an n-bit addition takes n clock periods. A parallel adder presents all bits at once and completes in a single propagation delay. The serial adder is simpler and smaller, which is the trade it makes.
Please log in or register to report this question.
A toggle operation cannot be performed using a single
Answer: B
Correct answer: AND gate
Toggling means inverting, and inversion requires a gate that can produce a complement. NAND, NOR and XOR can each be wired to invert - tie the inputs together, or hold one XOR input at 1 - but an AND gate with its inputs tied together simply reproduces the input, so it can never toggle.
Please log in or register to report this question.
Odd parity of a word can be conveniently tested by
Answer: D
Correct answer: XOR gate
An XOR gate outputs 1 when an odd number of its inputs are 1, which is exactly what a parity test asks. Chaining XOR gates over a word therefore gives 1 for odd parity and 0 for even. AND, OR and NOR have no such property.
Please log in or register to report this question.
The output of a NAND gate is LOW if ________.
Answer: B
Correct answer: all inputs are HIGH
NAND is the complement of AND, and AND is 1 only when every input is 1. So NAND is 0 in exactly that case and 1 in all the others.
Please log in or register to report this question.
How many full adders are required to construct an m-bit parallel adder ?
Answer: B
Correct answer: m-1
In an m-bit ripple carry adder the lowest bit has no incoming carry and needs only a half adder; the other \( m-1 \) bits each add two bits and a carry, which is the full adder's job.
Please log in or register to report this question.
One advantage TTL has over CMOS is that TTL is ________.
Answer: B
Correct answer: not sensitive to electrostatic discharge
CMOS inputs are insulated gates that a static discharge can puncture, so the devices need careful handling; TTL inputs are transistor junctions and are far more robust. On the other three counts CMOS now matches or beats TTL.
Please log in or register to report this question.
A logic gate has one or more output terminals and one input terminal.
Answer: B
Correct answer: False
The statement is inverted. A logic gate has one or more inputs and a single output.
Please log in or register to report this question.
With regard to an AND gate, which statement is true?
Answer: C
Correct answer: If one input to a 2-input AND gate is HIGH, the output reflects the other input
Holding one AND input HIGH makes the output follow the other input exactly, which is how an AND gate is used as an enable. An AND gate may have more than two inputs but has only one output, and two inputs give four combinations, not eight.
Please log in or register to report this question.