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Shift Registers Questions and Answers

Answer: A

The diagram shows a parallel-in parallel-out shift register. It has four D flip-flops driven by one common clock, and each flip-flop has its own separate input line into D and its own separate output line from Q. All the bits are loaded together on a clock pulse and are available at the same time at the outputs. In a serial-in register only the first flip-flop would have an external input and the others would take their inputs from the flip-flop before, and in a serial-out register only the last output would be used, which is not what the figure shows.

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2.

Assertion (A) : Universal shift register can be used to implement accumulator.
Reason (R) : Addition and subtraction can be realised using shift registers.

Exam Year(s)

MH SET - 2019, SET Exam - 2019,

Answer: B

The key takes both statements as true but the Reason as not the explanation of the Assertion.

The Assertion is sound: a universal shift register can shift left or right, load in parallel and hold, and a register that loads, holds and shifts is exactly the storage an accumulator needs; shifting also doubles or halves its contents. The Reason is true in a looser sense: serial adders and subtractors are built from shift registers feeding a single full adder with a carry flip-flop.

But the accumulator is a register that holds the running result of an arithmetic unit; it is the adder or ALU, not the shifting, that does the addition, so the Reason does not explain why the register can serve as an accumulator. That is why option A is not the key. Neither statement is false, so C and D are out.

I could not find a text that discusses this exact pair, so this rests on the key and on the reasoning above, which is the usual reading of such items.

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