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Embedded System Design Cycle Questions and Answers

Answer: C

Track layout, ground planes, filtering and enclosure design all bear on it and all become expensive to alter once the board is committed. A failure discovered at the test house weeks before launch is one of the classic embedded disasters.

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Answer: D

The design has already been proved; what varies from unit to unit is the solder joint, the wrong component and the damaged device. The test therefore has to be quick, comprehensive against assembly faults and cheap to run on every unit.

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Answer: A

Correct answer: alongside the product, not after it

Designing the test jig with the product is what makes the product testable: test points get placed, a diagnostic mode gets included, connectors are made accessible. Left until after the design is frozen, the jig has to work with whatever access happens to exist, and the usual result is a test that is slow, incomplete or impossible.

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Answer: B

The jig holds the board, provides power and drives the debug interface, which also lets it run the functional test and write the calibration in the same operation. Serialisation and provisioning of keys are commonly done at the same station.

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Answer: C

The whole point is that the value differs from unit to unit, so it cannot live in the shared image, and the unit must carry it in order to work away from the factory. A protected region of flash or a small EEPROM is the usual home.

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Answer: D

Recalling units or visiting sites costs orders of magnitude more than an update over the product's own interface. Retrofitting the capability afterwards is often impossible, since the flash layout and the loader have to be planned for.

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Answer: A

A power failure part way through, or a corrupted image, must leave the unit still able to try again, which means the loader itself is never overwritten and the image is verified before it is committed. Two application banks with a fallback is the robust arrangement.

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Answer: B

A sentence rewritten costs an hour; the same misunderstanding discovered after the board, the firmware and the test set have been built on it costs all three. That accumulation is precisely why the cost escalates with the stage.

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Answer: C

The source may be the same but the compiler, the word width, the alignment, the timing and every register access differ, and none of that is exercised on the host. Host tests are fast feedback on logic and no substitute for running on the part.

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40.

Consider the following statements about the design cycle.

1. Non-functional requirements constrain the architecture   2. A fault costs more the later it is found   3. Host unit tests replace on-target testing

Answer: D

The first two are correct and both are routinely underestimated. Host tests exercise the logic quickly and say nothing about registers, alignment or timing, so they complement on-target testing rather than replacing it.

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