Match List I with List II and select the correct answer using the codes given below :List IList II(a) TCON(i) contains status information(b) SBUF(ii) timer/counter control register(c) TMOD(iii) idle bit, power down bit(d) PSW(iv) serial data buffer for \(T_x\) and \(R_x\)(e) PCON(v) timer/counter modes of operation

The correct matching is a-ii, b-iv, c-v, d-i, e-iii.TCON is the timer/counter control register, with the run and overflow flags (ii).SBUF is the serial data buffer for transmission and reception (iv).TMOD selects the timer/counter modes of operation (v).PSW, the program status word, contains status information such as the carry, auxiliary carry, overflow and parity flags (i).PCON, the power control register, contains the idle and power-down bits (iii).The other codes confuse TCON with TMOD or give PSW the power control bits.

Match the following :List IList II(1) TCON(i) contains status information(2) SBUF(ii) timer/counter control register(3) TMOD(iii) idle bit, power down bit(4) PSW(iv) serial data buffer for Tx and Rx(5) PCON(v) timer/counter modes of operation

The correct match is 1-ii, 2-iv, 3-v, 4-i, 5-iii.TCON: timer/counter control register, holding the run and overflow flags of the timers and the external interrupt flags (ii).SBUF: serial data buffer, used for both transmitting and receiving (iv).TMOD: timer/counter mode register, selecting the mode of operation of each timer (v).PSW: program status word, holding status flags such as carry, auxiliary carry, overflow and parity, and the register bank select bits (i).PCON: power control register, with the idle and power-down bits and SMOD (iii).Each of the other options mismatches TCON with status or modes, or SBUF with mode bits, which these 8051 registers do not hold.

8051 Microcontroller Architecture Questions and Answers

Q: If the .......... pin is ............., then we have the option of using the .......... ROM or EPROM together with .............. memory and devices.

The answer is \(\overline{\mathrm{EA}}\), high, internal, external.The \(\overline{\mathrm{EA}}\) (external access) pin of the 8051 decides where program memory is fetched from. When it is tied high, the chip executes from its internal ROM or EPROM for the low addresses and automatically goes to external memory for addresses beyond it, so internal ROM and external memory and devices can be used together.When \(\overline{\mathrm{EA}}\) is tied low, all program fetches go to external memory and the internal ROM is ignored. That rules out the options combining low with internal, and the option reversing internal and external.

Q: If no key is pressed microcontroller 8051 port will read :

With no key pressed an 8051 port reads 1.Ports 1, 2 and 3 of the 8051 have internal pull-up resistors, and a pin written with 1 is configured as an input pulled high. A key is normally wired between the port pin and ground, so pressing it pulls that pin to 0. With no key pressed, nothing pulls the pin down and it reads logic 1 (and an all-released port reads FFH).A 0 would be read only while a key is pressed. 'NC' means no connection and is not a logic level, and 7 is not a value a single port bit can take.

Q: What is the Address (SFR) for TCON, SCON, SBUF, PCON and PSW respectively ?

The addresses are 88H, 98H, 99H, 87H, 0D0H.In the 8051's special function register space:TCON, timer control: 88HSCON, serial control: 98HSBUF, serial buffer: 99HPCON, power control: 87HPSW, program status word: D0H, written 0D0H in assembly so it starts with a digitThe other options list the same five addresses in a different order. Option B puts SCON at 88H, which is TCON's address; option C starts with PSW's address; and option D starts with PCON's 87H for TCON. A useful check is that the bit-addressable registers, TCON, SCON and PSW, all sit at addresses ending in 0 or 8.

Q: Which of the following should a microcontroller at least consist of :

A microcontroller must at least have CPU, RAM, ROM, I/O ports and Timers.The defining feature of a microcontroller, as against a microprocessor, is that it is a computer on a single chip: the processor core together with program memory (ROM or flash), data memory (RAM), input/output ports and timers/counters. The 8051, for example, combines a CPU, 4 KB ROM, 128 bytes RAM, four I/O ports and two timers.Each of the other options leaves one component out: A has no RAM, B has no CPU, and C has no ROM to hold the program. Only option D lists all of them.

Q: If the ............. pin is .........., then we have the option of using the ......... ROM or EPROM together with ....... memory and devices.

The answer is EA, high, internal, external.The 8051's EA (External Access) pin selects where the program comes from. When EA is connected high (to VCC), the 8051 fetches code from its internal ROM or EPROM for the lower addresses (the first 4 KB in the 8051) and automatically uses external memory for addresses beyond it, so internal and external memory can be used together.When EA is tied low, the internal ROM is ignored and all program fetches go to external memory. Options with EA low therefore cannot give the use of internal ROM, and the option with 'high, external, internal' reverses which memory is used first.

11.

If the .......... pin is ............., then we have the option of using the .......... ROM or EPROM together with .............. memory and devices.

A.\(\overline{\mathrm{EA}}\), high, internal, external
B.\(\overline{\mathrm{EA}}\), low, internal, external
C.\(\overline{\mathrm{EA}}\), high, external, internal
D.\(\overline{\mathrm{EA}}\), low, external, internal

Exam Year(s)

MH SET - 2023, SET Exam - 2023,

Answer: B

The answer is \(\overline{\mathrm{EA}}\), high, internal, external.

The \(\overline{\mathrm{EA}}\) (external access) pin of the 8051 decides where program memory is fetched from. When it is tied high, the chip executes from its internal ROM or EPROM for the low addresses and automatically goes to external memory for addresses beyond it, so internal ROM and external memory and devices can be used together.

When \(\overline{\mathrm{EA}}\) is tied low, all program fetches go to external memory and the internal ROM is ignored. That rules out the options combining low with internal, and the option reversing internal and external.

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12.

Match List I with List II and select the correct answer using the codes given below :

List I	List II
(a) TCON	(i) contains status information
(b) SBUF	(ii) timer/counter control register
(c) TMOD	(iii) idle bit, power down bit
(d) PSW	(iv) serial data buffer for \(T_x\) and \(R_x\)
(e) PCON	(v) timer/counter modes of operation

A.a-ii, b-iv, c-v, d-i, e-iii
B.a-i, b-v, c-iv, d-iii, e-ii
C.a-v, b-iii, c-ii, d-iv, e-i
D.a-iii, b-ii, c-i, d-v, e-iv

Exam Year(s)

MH SET - 2023, SET Exam - 2023,

Answer: A

The correct matching is a-ii, b-iv, c-v, d-i, e-iii.

TCON is the timer/counter control register, with the run and overflow flags (ii).
SBUF is the serial data buffer for transmission and reception (iv).
TMOD selects the timer/counter modes of operation (v).
PSW, the program status word, contains status information such as the carry, auxiliary carry, overflow and parity flags (i).
PCON, the power control register, contains the idle and power-down bits (iii).

The other codes confuse TCON with TMOD or give PSW the power control bits.

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13.

If no key is pressed microcontroller 8051 port will read :

A.0
B.1
C.NC
D.7

Exam Year(s)

MH SET - 2024, SET Exam - 2024,

Answer: B

With no key pressed an 8051 port reads 1.

Ports 1, 2 and 3 of the 8051 have internal pull-up resistors, and a pin written with 1 is configured as an input pulled high. A key is normally wired between the port pin and ground, so pressing it pulls that pin to 0. With no key pressed, nothing pulls the pin down and it reads logic 1 (and an all-released port reads FFH).

A 0 would be read only while a key is pressed. 'NC' means no connection and is not a logic level, and 7 is not a value a single port bit can take.

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14.

What is the Address (SFR) for TCON, SCON, SBUF, PCON and PSW respectively ?

A.88H, 98H, 99H, 87H, 0D0H
B.98H, 99H, 87H, 88H, 0D0H
C.0D0H, 87H, 88H, 99H, 98H
D.87H, 88H, 0D0H, 98H, 99H

Exam Year(s)

MH SET - 2024, SET Exam - 2024,

Answer: A

The addresses are 88H, 98H, 99H, 87H, 0D0H.

In the 8051's special function register space:

TCON, timer control: 88H
SCON, serial control: 98H
SBUF, serial buffer: 99H
PCON, power control: 87H
PSW, program status word: D0H, written 0D0H in assembly so it starts with a digit

The other options list the same five addresses in a different order. Option B puts SCON at 88H, which is TCON's address; option C starts with PSW's address; and option D starts with PCON's 87H for TCON. A useful check is that the bit-addressable registers, TCON, SCON and PSW, all sit at addresses ending in 0 or 8.

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15.

Which of the following should a microcontroller at least consist of :

A.CPU, ROM, I/O ports and Timers
B.RAM, ROM, I/O ports and Timers
C.CPU, RAM, I/O ports and Timers
D.CPU, RAM, ROM, I/O ports and Timers

Exam Year(s)

MH SET - 2024, SET Exam - 2024,

Answer: D

A microcontroller must at least have CPU, RAM, ROM, I/O ports and Timers.

The defining feature of a microcontroller, as against a microprocessor, is that it is a computer on a single chip: the processor core together with program memory (ROM or flash), data memory (RAM), input/output ports and timers/counters. The 8051, for example, combines a CPU, 4 KB ROM, 128 bytes RAM, four I/O ports and two timers.

Each of the other options leaves one component out: A has no RAM, B has no CPU, and C has no ROM to hold the program. Only option D lists all of them.

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16.

Match the following :

List I	List II
(1) TCON	(i) contains status information
(2) SBUF	(ii) timer/counter control register
(3) TMOD	(iii) idle bit, power down bit
(4) PSW	(iv) serial data buffer for Tx and Rx
(5) PCON	(v) timer/counter modes of operation

A.1-ii, 2-iv, 3-v, 4-i, 5-iii
B.1-i, 2-v, 3-iv, 4-iii, 5-ii
C.1-v, 2-iii, 3-ii, 4-iv, 5-i
D.1-iii, 2-ii, 3-i, 4-v, 5-iv

Exam Year(s)

MH SET - 2025, SET Exam - 2025,

Answer: A

The correct match is 1-ii, 2-iv, 3-v, 4-i, 5-iii.

TCON: timer/counter control register, holding the run and overflow flags of the timers and the external interrupt flags (ii).
SBUF: serial data buffer, used for both transmitting and receiving (iv).
TMOD: timer/counter mode register, selecting the mode of operation of each timer (v).
PSW: program status word, holding status flags such as carry, auxiliary carry, overflow and parity, and the register bank select bits (i).
PCON: power control register, with the idle and power-down bits and SMOD (iii).

Each of the other options mismatches TCON with status or modes, or SBUF with mode bits, which these 8051 registers do not hold.

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17.

If the ............. pin is .........., then we have the option of using the ......... ROM or EPROM together with ....... memory and devices.

A.EA, high, internal, external
B.EA, low, internal, external
C.EA, high, external, internal
D.EA, low, external internal

Exam Year(s)

MH SET - 2025, SET Exam - 2025,

Answer: B

The answer is EA, high, internal, external.

The 8051's EA (External Access) pin selects where the program comes from. When EA is connected high (to V_CC), the 8051 fetches code from its internal ROM or EPROM for the lower addresses (the first 4 KB in the 8051) and automatically uses external memory for addresses beyond it, so internal and external memory can be used together.

When EA is tied low, the internal ROM is ignored and all program fetches go to external memory. Options with EA low therefore cannot give the use of internal ROM, and the option with 'high, external, internal' reverses which memory is used first.

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18.

In 8051, Pin 30 (ALE / \(\overline{\text{PROG}}\)), if this bit is set as logic zero (‘0’), it signifies

A.Address is latched
B.For enabling internal ROM of programming
C.For disabling internal ROM programming
D.Both (A) and (C)

Exam Year(s)

UGC NET - 2012,

Answer: B

The key takes the answer as option (B), for enabling the internal ROM for programming. Pin 30 of the 8051 is ALE, which is used as the address latch enable during normal work. The same pin takes the programming pulse, PROG, with an overbar because it is active low, when the on-chip program memory is being programmed. The key reads a logic zero on this pin as the condition that enables programming of the internal ROM. Option (A), address is latched, belongs to the ALE function when it is high. Option (C), disabling programming, is the opposite of the key. Option (D) combines (A) and (C). The wording of the item is loose, so it follows the key.

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19.

The following are features of a micro controller 8051 :

(i) 4 k bytes of ROM or EPROM
(ii) 128 k bytes of data memory
(iii) Four programmable I/O ports
(iv) Three 16 bit timer/event counters.

A.(i), (ii) and (iii)
B.(i), (ii) and (iv)
C.(i), (iii) and (iv)
D.(ii), (iii) and (iv)

Exam Year(s)

UGC NET - 2013,

Answer: A

The key accepts (i), (ii) and (iii), the first option. The 8051 has 4 k bytes of on-chip ROM or EPROM, four programmable 8-bit I/O ports, and a block of on-chip data memory, which in the 8051 is 128 bytes, and this is the statement meant in (ii).

Statement (iv) is wrong for the 8051, which has two 16-bit timer or event counters and not three, the third timer being a feature of the 8052. So the options containing (iv) are wrong.

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