Match List I with List II and select the correct answer using codes given below :List IList II(a) Error signal(1) Modulated signal(b) Control signal(2) Phase detector(c) Output signal(3) Loop filter(d) Input signal(4) Voltage controlled oscillatorCodes : (a) (b) (c) (d)

The correct code is (2) (3) (4) (1).(a) The error signal comes from the phase detector, which compares the input and VCO phases.(b) The control signal comes from the loop filter, which smooths the error signal.(c) The output signal is produced by the voltage controlled oscillator.(d) The input signal is the modulated signal the PLL locks on to.Options B and D start the loop at the VCO, and option A swaps the loop filter and the VCO.

Phase Locked Loop Questions and Answers

Q: According to transfer characteristics of XLL the phase error between VCO output and incoming signal must be maintained between............ in order to maintain a lock.

The phase error must stay between 0 and π.In a phase locked loop, the phase detector converts the phase difference between the VCO output and the incoming signal into a control voltage. For the common XOR-type detector, the average output rises linearly as the phase error goes from 0 to \(\pi\) and then falls again from \(\pi\) to \(2\pi\). The loop can correct the VCO only while the error stays on the rising part, 0 to \(\pi\), with the locked operating point normally near \(\pi/2\).Outside that range the slope reverses, so the feedback has the wrong sign and lock is lost. The ranges 0 to \(\pi/2\), 0 to \(2\pi\) and \(\pi\) to \(2\pi\) are not the monotonic range of that characteristic.

Q: Which of the following is not true in case of phase locked loop ?

The statement that is not true is the VCO input is always zero when locked.In a phase locked loop, the phase detector compares the input with the VCO output, and the filtered error voltage drives the VCO. When locked, the VCO frequency equals the input frequency and tracks it, and the phases are held in a fixed relationship, so statements A, B and C describe a locked loop.The VCO control voltage is zero only if the input happens to be at the VCO's free-running frequency. For any other input frequency within the lock range, a non-zero control voltage, produced by a small steady phase error, is exactly what holds the VCO at the input frequency.

Q: Which of the following holds good for a phase locked loop ?

For a phase locked loop, the lock range is greater than the capture range.The capture range is the band of input frequencies over which an unlocked PLL can acquire lock. The lock (tracking) range is the band over which a PLL that is already locked can follow a changing input frequency. Once locked, the loop can track further than it could capture from the unlocked state, so the lock range is the wider of the two.During lock the VCO frequency equals the input frequency, not exceeds it, and the VCO control voltage is generally non-zero, since it is what holds the VCO at the input frequency.

According to transfer characteristics of XLL the phase error between VCO output and incoming signal must be maintained between............ in order to maintain a lock.

A.0 and π
B.0 and π/2
C.0 and 2π
D.π and 2π

Exam Year(s)

MH SET - 2018, SET Exam - 2018,

Answer: A

The phase error must stay between 0 and π.

In a phase locked loop, the phase detector converts the phase difference between the VCO output and the incoming signal into a control voltage. For the common XOR-type detector, the average output rises linearly as the phase error goes from 0 to \(\pi\) and then falls again from \(\pi\) to \(2\pi\). The loop can correct the VCO only while the error stays on the rising part, 0 to \(\pi\), with the locked operating point normally near \(\pi/2\).

Outside that range the slope reverses, so the feedback has the wrong sign and lock is lost. The ranges 0 to \(\pi/2\), 0 to \(2\pi\) and \(\pi\) to \(2\pi\) are not the monotonic range of that characteristic.

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Which of the following is not true in case of phase locked loop ?

A.The phases of input and VCO are matched
B.The frequency of input and VCO are same
C.The VCO frequency tracks the input
D.The VCO input is always zero when locked

Exam Year(s)

MH SET - 2019, SET Exam - 2019,

Answer: D

The statement that is not true is the VCO input is always zero when locked.

In a phase locked loop, the phase detector compares the input with the VCO output, and the filtered error voltage drives the VCO. When locked, the VCO frequency equals the input frequency and tracks it, and the phases are held in a fixed relationship, so statements A, B and C describe a locked loop.

The VCO control voltage is zero only if the input happens to be at the VCO's free-running frequency. For any other input frequency within the lock range, a non-zero control voltage, produced by a small steady phase error, is exactly what holds the VCO at the input frequency.

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Which of the following holds good for a phase locked loop ?

A.Lock range \(\lt\) capture range
B.Lock range \(\gt\) capture range
C.VCO frequency \(\gt\) input frequency during lock
D.VCO input voltage is zero during lock

Exam Year(s)

MH SET - 2020, SET Exam - 2020,

Answer: B

For a phase locked loop, the lock range is greater than the capture range.

The capture range is the band of input frequencies over which an unlocked PLL can acquire lock. The lock (tracking) range is the band over which a PLL that is already locked can follow a changing input frequency. Once locked, the loop can track further than it could capture from the unlocked state, so the lock range is the wider of the two.

During lock the VCO frequency equals the input frequency, not exceeds it, and the VCO control voltage is generally non-zero, since it is what holds the VCO at the input frequency.

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Match List I with List II and select the correct answer using codes given below :

List I	List II
(a) Error signal	(1) Modulated signal
(b) Control signal	(2) Phase detector
(c) Output signal	(3) Loop filter
(d) Input signal	(4) Voltage controlled oscillator

Codes : (a) (b) (c) (d)

A.(2) (4) (3) (1)
B.(4) (3) (1) (2)
C.(2) (3) (4) (1)
D.(4) (1) (3) (2)

Exam Year(s)

MH SET - 2020, SET Exam - 2020,

Answer: C

The correct code is (2) (3) (4) (1).

(a) The error signal comes from the phase detector, which compares the input and VCO phases.
(b) The control signal comes from the loop filter, which smooths the error signal.
(c) The output signal is produced by the voltage controlled oscillator.
(d) The input signal is the modulated signal the PLL locks on to.

Options B and D start the loop at the VCO, and option A swaps the loop filter and the VCO.

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