Power Management in Embedded Systems Questions and Answers

Answer: A

Each transition charges or discharges the node capacitance through the supply, so the energy per transition goes as the square of the voltage and the power as the rate of transitions. It is why lowering the supply is worth so much more than lowering the clock.

Answer: B

Sub-threshold and gate leakage flow whether or not anything is switching, and they rise steeply with temperature and with process shrinkage. That is why a deeply sleeping part draws far more at seventy degrees than at twenty.

Answer: C

A sleep current quoted as two microamperes at room temperature may be twenty at seventy degrees, so a battery life computed from the datasheet's headline figure can be wrong by an order of magnitude. The temperature at which a figure is quoted matters as much as the figure.

Answer: D

Correct answer: a quarter of its former value

Dynamic power is \[ P = \alpha CV^{2}f, \] so at constant frequency it goes as the square of the supply and halving \( V \) leaves a quarter. That quadratic dependence is why voltage scaling is the most powerful lever in low power design, and why a core is run at the lowest voltage its target frequency permits.

Answer: A

Energy per operation falls as the square of the supply, so doing the same work more slowly at a lower voltage wins where the deadline permits. Raising the clock reduces the time but raises the power in proportion, leaving the energy much as it was.

Answer: B

Halting the core alone saves the largest single consumer while leaving timers, converters and serial ports running, so waking costs nothing and no state is lost. It is the mode a tickless idle loop enters between one event and the next.

Answer: C

Power is removed from most of the die and a few kilobytes of backup RAM and the real time clock are kept alive, so waking is effectively a reset with a little state preserved. That reinitialisation is the cost that has to be weighed against the microamperes saved.

Answer: D

Correct answer: 1-Q, 2-R, 3-P

The three modes trade retained state against current. Sleep halts the core while leaving peripherals and RAM live, so a peripheral interrupt resumes execution immediately. Deep sleep retains the RAM but stops most clocks, so more state survives than in shutdown but wake-up takes longer. Shutdown keeps only a small retained region and the real time clock, drawing perhaps a microamp, and the application restarts rather than resumes.

Answer: A

A mode saving a microampere but costing ten milliseconds and a full reinitialisation is a loss for anything waking every second. The comparison must be made in energy per cycle rather than in current, which is the mistake most often made.

Answer: B

The saving over a second is five microampere seconds; the extra twenty milliseconds at, say, five milliamperes costs a hundred. The deep mode pays only when the sleep is long enough to amortise the wake-up, which for these figures means tens of seconds.