8051 Microcontroller Architecture Questions and Answers

Answer: C

The internal RAM of the 8051 is 128 bytes.

The 8051 microcontroller has 128 bytes of on-chip data RAM (addresses 00H to 7FH), holding four register banks of 8 registers each, a 16-byte bit-addressable area and a general-purpose scratch pad. It also has 4 KB of on-chip ROM and can address 64 KB of external memory.

32 bytes is only the four register banks, 64 bytes is not an 8051 figure, and 64 KB is the external program or data memory space, not internal RAM. The 8052 variant doubles the internal RAM to 256 bytes.

Answer: A

The execution time is 4 µs.

\[ \begin{aligned} T_{osc} &= \frac{1}{12\ \text{MHz}} = \frac{1}{12}\ \mu s \\ T_{cycle} &= 12 \times \frac{1}{12}\ \mu s = 1\ \mu s \\ T_{instr} &= 4 \times 1\ \mu s = 4\ \mu s \end{aligned} \]

With the usual 12 MHz crystal, each machine cycle of the 8051 takes exactly 1 µs, so a 4-cycle instruction (such as MUL or DIV) takes 4 µs. 1 µs is a single machine cycle, and 8 µs or 2 µs would need a 6 MHz or 24 MHz clock.

Answer: D

The SFR that is not bit addressable is SBUF, the serial data buffer.

In the 8051, only the special function registers whose addresses end in 0H or 8H (divisible by 8) are bit addressable. ACC is at E0H, PSW at D0H and port P0 at 80H, so their individual bits can be set, cleared and tested with bit instructions.

SBUF is at 99H, which does not end in 0 or 8, so it can only be read or written as a whole byte.

Answer: B

The 8051 interrupt vectors are located in 0000-0023H.

The interrupt vectors are fixed addresses at the bottom of program memory (ROM). Reset starts execution at 0000H, and the five interrupts vector to 0003H (external INT0), 000BH (timer 0), 0013H (external INT1), 001BH (timer 1) and 0023H (serial port), each with 8 bytes of space.

They are in code memory, not in on-chip RAM, and with an internal ROM they are not in external memory; 0001-1000H does not correspond to the vector table.

Answer: B

The 8051 generates 16-bit addresses with the help of ALE.

Port 0 of the 8051 is multiplexed: it first carries the low byte of the address (A0-A7) and then the data byte. The Address Latch Enable (ALE) pulse tells an external latch (such as a 74LS373) to capture the low address byte, while port 2 supplies the high byte (A8-A15). Together they form the 16-bit address even though the data bus is only 8 bits.

IO/M is an 8085 signal, and R/W is a generic read-write line, neither of which latches addresses. The EA pin selects whether the 8051 executes from internal or external program memory.

Answer: B

The alternate function of port 2 is sending the higher order address (A₈-A₁₅).

When the 8051 accesses external memory, port 2 outputs the upper byte of the 16-bit address, while port 0 carries the lower byte multiplexed with data.

The data byte D₀-D₇ and the lower address A₀-A₇ are the alternate functions of port 0. Serial input and output (RXD, TXD) are alternate functions of port 3.

Answer: C

The locations are 00 - 07 and 20 - 2F.

On reset the 8051 selects register bank 0, so R0-R7 (printed R_o - R_I) occupy internal RAM addresses 00H to 07H. Banks 1 to 3 follow up to 1FH. The bit-addressable area is the 16 bytes from 20H to 2FH, giving 128 individually addressable bits, and the general-purpose scratch area runs from 30H to 7FH.

00-7F is the whole lower internal RAM and 80-FF holds the special function registers. 30-7F is the scratch area, not the register bank.