Computer Network Questions and Answers

Q: How many flip-flops are required to build a modulus-16 binary counter?

Correct answer: 4A binary counter with \( n \) flip-flops passes through \( 2^{n} \) distinct states, so a modulus-16 counter needs \[ 2^{n} = 16 \quad\Rightarrow\quad n = 4. \] Each flip-flop stores one bit, and four bits represent the sixteen values 0000 to 1111 - decimal 0 to 15. The general rule is worth remembering in both directions: for a required modulus \( N \), the number of flip-flops is the smallest \( n \) with \( 2^{n} \ge N \). A decade counter of modulus 10 therefore still needs four flip-flops, and the six unused states are removed by feedback that resets the counter at a count of ten. Counters divide as well as count: a modulus-16 counter’s most significant output is the clock frequency divided by 16, which is why they are used as frequency dividers. An asynchronous or ripple counter clocks each stage from the previous one and is simpler but slower; a synchronous counter clocks every stage together and avoids the accumulated delay.

Q: Which of the following digits are known as the area code of the network user address (NUA) ?

Correct answer: 5-7In a network user address the first four digits are the DNIC, digits 5 to 7 the area, and 8 to 12 the terminal.

Q: A Karnaugh map is used to ________.

Correct answer: simplify Boolean expressionsA Karnaugh map arranges a truth table so that adjacent cells differ in one variable, letting groups of ones be combined by inspection. It is a visual substitute for repeated algebraic manipulation.

Q: Which of these performs the arithmetic and logic operations in a computer?

Correct answer: ALUThe arithmetic logic unit carries out arithmetic operations such as addition and subtraction and logical operations such as AND, OR, NOT and XOR, together with shifts and comparisons. It is one of the three parts of the central processing unit, the others being the control unit, which fetches and decodes instructions and directs the rest of the machine, and the registers, which hold the operands and results the ALU works on. Alongside its result the ALU sets flag bits - zero, carry, sign and overflow - and those flags are what conditional branch instructions test, which is how a program makes decisions. RAM and ROM are memory and store data rather than operate on it, and a bus is a set of parallel conductors carrying data, addresses or control signals between components. Subtraction inside the ALU is performed as addition of the 2’s complement, which is why no separate subtractor is needed.

Q: A ripple counter is faster than a synchronous counter of the same length.

Correct answer: FalseThe statement is false - the reverse is true. A ripple counter is slower. In a ripple, or asynchronous, counter only the first flip-flop receives the clock; each later stage is clocked by the output of the one before it. The change therefore propagates along the chain, and the total settling time is the number of stages multiplied by the propagation delay of one. A four-stage counter takes four gate delays to settle. In a synchronous counter every flip-flop is clocked simultaneously and combinational logic decides which stages change, so the whole counter settles in a single delay regardless of length. Speed is not the only difference. While a ripple counter is settling it passes through transient false states, which can produce glitches if the outputs are decoded - a real hazard in control circuits. A synchronous counter never shows a false intermediate count. The ripple counter’s advantage is simplicity: it needs no extra gates at all.

Q: In which ARQ, when a NAK is received, all frame sent since the last frame acknowledged an retransmitted

Correct answer: go-back-nIn go-back-N the receiver discards everything after the damaged frame, so the sender must retransmit that frame and all those sent after it. Selective reject retransmits only the damaged one, at the cost of buffering at the receiver.

Q: Phase shift keying (PSK.) method is used to modulate digital signals at 9600 bps using 16 levels. The line signals speed (i.e. modulation rate) will be

Correct answer: 2400 bandsSixteen levels carry \( \log_{2}16 = 4 \) bits per symbol, so\[ \text{baud} = \frac{9600}{4} = 2400 \]The baud rate is the symbol rate; it equals the bit rate only when each symbol carries one bit.

Q: A 100 km long cable runs at the T1 data rate. The propagation speed in the cable is two-thirds the speed of light. How many bits are in the cable?

Correct answer: 772First the propagation delay:\[ t = \frac{100\times 10^{3}}{2\times 10^{8}} = 500\ \mu\text{s} \]Then the bits in flight at the T1 rate of 1.544 Mbps:\[ 1.544\times 10^{6}\times 500\times 10^{-6} \approx 772\ \text{bits} \]

Q: What is the purpose of a parity bit ?

Correct answer: To detect errors in transmitted dataA parity bit is appended so that the total number of 1s is always even or always odd, letting the receiver spot a single flipped bit. It detects an odd number of errors but cannot say which bit changed, nor correct it.

Q: Which of these is a universal gate?

Correct answer: NANDNAND is a universal gate, meaning that any logic function whatever can be built using NAND gates alone. NOR is the other universal gate. The proof is constructive. An inverter is a NAND with both inputs tied together. An AND is a NAND followed by that inverter. An OR is a NAND fed by two inverters, which is De Morgan’s theorem realised in hardware: \( \overline{\bar{A} \cdot \bar{B}} = A + B \). Since AND, OR and NOT together are sufficient for every Boolean function, and all three can be made from NAND, NAND alone is sufficient. The property matters commercially. A manufacturer can fabricate a whole logic family from one repeated cell, which simplifies design, testing and inventory, and the regularity suits automated layout. AND, OR and XOR are not universal, because none of them can produce an inversion: with only non-inverting gates, an input of all 1s can never yield a 0.

121.

How many flip-flops are required to build a modulus-16 binary counter?

A.4
B.8
C.16
D.2

Answer: D

Correct answer: 4

A binary counter with \( n \) flip-flops passes through \( 2^{n} \) distinct states, so a modulus-16 counter needs \[ 2^{n} = 16 \quad\Rightarrow\quad n = 4. \] Each flip-flop stores one bit, and four bits represent the sixteen values 0000 to 1111 - decimal 0 to 15. The general rule is worth remembering in both directions: for a required modulus \( N \), the number of flip-flops is the smallest \( n \) with \( 2^{n} \ge N \). A decade counter of modulus 10 therefore still needs four flip-flops, and the six unused states are removed by feedback that resets the counter at a count of ten. Counters divide as well as count: a modulus-16 counter’s most significant output is the clock frequency divided by 16, which is why they are used as frequency dividers. An asynchronous or ripple counter clocks each stage from the previous one and is simpler but slower; a synchronous counter clocks every stage together and avoids the accumulated delay.

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122.

Which of the following digits are known as the area code of the network user address (NUA) ?

A.5-7
B.1-4
C.8-12
D.13-14

Answer: A

Correct answer: 5-7

In a network user address the first four digits are the DNIC, digits 5 to 7 the area, and 8 to 12 the terminal.

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123.

A Karnaugh map is used to ________.

A.convert decimal to binary
B.simplify Boolean expressions
C.measure propagation delay
D.increase the fan-out of a gate

Answer: A

Correct answer: simplify Boolean expressions

A Karnaugh map arranges a truth table so that adjacent cells differ in one variable, letting groups of ones be combined by inspection. It is a visual substitute for repeated algebraic manipulation.

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124.

Which of these performs the arithmetic and logic operations in a computer?

A.ALU
B.RAM
C.ROM
D.Bus

Answer: D

Correct answer: ALU

The arithmetic logic unit carries out arithmetic operations such as addition and subtraction and logical operations such as AND, OR, NOT and XOR, together with shifts and comparisons. It is one of the three parts of the central processing unit, the others being the control unit, which fetches and decodes instructions and directs the rest of the machine, and the registers, which hold the operands and results the ALU works on. Alongside its result the ALU sets flag bits - zero, carry, sign and overflow - and those flags are what conditional branch instructions test, which is how a program makes decisions. RAM and ROM are memory and store data rather than operate on it, and a bus is a set of parallel conductors carrying data, addresses or control signals between components. Subtraction inside the ALU is performed as addition of the 2’s complement, which is why no separate subtractor is needed.

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125.

A ripple counter is faster than a synchronous counter of the same length.

A.True
B.False

Answer: B

Correct answer: False

The statement is false - the reverse is true. A ripple counter is slower. In a ripple, or asynchronous, counter only the first flip-flop receives the clock; each later stage is clocked by the output of the one before it. The change therefore propagates along the chain, and the total settling time is the number of stages multiplied by the propagation delay of one. A four-stage counter takes four gate delays to settle. In a synchronous counter every flip-flop is clocked simultaneously and combinational logic decides which stages change, so the whole counter settles in a single delay regardless of length. Speed is not the only difference. While a ripple counter is settling it passes through transient false states, which can produce glitches if the outputs are decoded - a real hazard in control circuits. A synchronous counter never shows a false intermediate count. The ripple counter’s advantage is simplicity: it needs no extra gates at all.

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126.

In which ARQ, when a NAK is received, all frame sent since the last frame acknowledged an retransmitted

A.stop-and-wait
B.go-back-n
C.selective-reject
D.both (a) and (b)

Answer: B

Correct answer: go-back-n

In go-back-N the receiver discards everything after the damaged frame, so the sender must retransmit that frame and all those sent after it. Selective reject retransmits only the damaged one, at the cost of buffering at the receiver.

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127.

Phase shift keying (PSK.) method is used to modulate digital signals at 9600 bps using 16 levels. The line signals speed (i.e. modulation rate) will be

A.2400 bands
B.1200 bands
C.4800 bands
D.9600 bands

Answer: A

Correct answer: 2400 bands

Sixteen levels carry \( \log_{2}16 = 4 \) bits per symbol, so

\[ \text{baud} = \frac{9600}{4} = 2400 \]

The baud rate is the symbol rate; it equals the bit rate only when each symbol carries one bit.

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128.

A 100 km long cable runs at the T1 data rate. The propagation speed in the cable is two-thirds the speed of light. How many bits are in the cable?

A.572
B.672
C.772
D.873

Answer: C

Correct answer: 772

First the propagation delay:

\[ t = \frac{100\times 10^{3}}{2\times 10^{8}} = 500\ \mu\text{s} \]

Then the bits in flight at the T1 rate of 1.544 Mbps:

\[ 1.544\times 10^{6}\times 500\times 10^{-6} \approx 772\ \text{bits} \]

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129.

What is the purpose of a parity bit ?

A.To increase transmission speed
B.To detect errors in transmitted data
C.To compress the data
D.To address a memory location

Answer: C

Correct answer: To detect errors in transmitted data

A parity bit is appended so that the total number of 1s is always even or always odd, letting the receiver spot a single flipped bit. It detects an odd number of errors but cannot say which bit changed, nor correct it.

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130.

Which of these is a universal gate?

A.NAND
B.AND
C.OR
D.XOR

Answer: A

Correct answer: NAND

NAND is a universal gate, meaning that any logic function whatever can be built using NAND gates alone. NOR is the other universal gate. The proof is constructive. An inverter is a NAND with both inputs tied together. An AND is a NAND followed by that inverter. An OR is a NAND fed by two inverters, which is De Morgan’s theorem realised in hardware: \( \overline{\bar{A} \cdot \bar{B}} = A + B \). Since AND, OR and NOT together are sufficient for every Boolean function, and all three can be made from NAND, NAND alone is sufficient. The property matters commercially. A manufacturer can fabricate a whole logic family from one repeated cell, which simplifies design, testing and inventory, and the regularity suits automated layout. AND, OR and XOR are not universal, because none of them can produce an inversion: with only non-inverting gates, an input of all 1s can never yield a 0.

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