Machine dependent optimisation includes
Answer: A
Choosing instructions and ordering them for a particular pipeline requires knowledge of the machine. The other three improve the intermediate form regardless of the target. That division is what allows a front end to be shared across machines.
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Instruction scheduling reorders instructions in order to
Answer: B
Placing independent instructions between a load and its use hides the latency. Scheduling interacts with register allocation, since a longer schedule needs more registers. Balancing the two is one of the harder problems in back end design.
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Assertion (A): Instruction scheduling and register allocation are in tension with one another.
Reason (R): Spreading instructions apart to hide latency lengthens the lifetimes of values and so demands more registers.
Answer: C
Correct answer: Both A and R are true, and R is the correct explanation of A
Both are true and the reason gives the mechanism. The scheduler separates a load from its use to cover the latency, which keeps the loaded value alive across the gap; do that for many values at once and the register pressure rises until the allocator must spill. Scheduling before allocation gives good schedules with spills, and after it gives poor schedules without - hence the various combined approaches.
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Register allocation is commonly modelled as
Answer: D
Correct answer: a graph colouring problem over an interference graph
Each value is a node, and two nodes are joined if their live ranges overlap so that they cannot share a register. Assigning \( k \) registers is then colouring the graph with \( k \) colours. The problem is NP-complete in general, so compilers use Chaitin-style heuristics and spill to memory when the colouring fails.
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Spilling a value during register allocation means
Answer: A
Spilling costs a store and one or more loads, so allocators try to spill the value used least often. Rematerialisation, recomputing a cheap value instead, is sometimes preferred. A constant is almost always cheaper to recompute than to reload.
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An optimisation that reduces code size may be preferred over one that reduces execution time when
Answer: B
Embedded targets often have severe memory constraints. Compilers expose separate flags for optimising size, which suppress transformations such as unrolling and aggressive inlining. Some targets have so little memory that size is the only consideration.
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Optimising for size and optimising for speed conflict most obviously in
Answer: C
Correct answer: loop unrolling and function inlining
Both trade code size for speed directly: unrolling duplicates the body to amortise the loop control, and inlining duplicates the callee at every site. Under an optimise-for-size setting both are curtailed. Dead code removal, common subexpression elimination and constant folding all reduce size and time together, so they present no conflict.
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Which of the following reduces both code size and execution time?
Answer: D
The first three all enlarge the program in exchange for speed. Removing dead code makes the program both smaller and faster, which is why it is applied at every optimisation level. It also simplifies the code that later passes have to consider.
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An optimising compiler cannot in general produce the fastest possible program because
Answer: A
Even restricted forms of the problem are computationally hard. Real optimisers apply a sequence of heuristics that usually improve the program without any guarantee of optimality. Measuring the result on real programs is the only way to tune them.
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State whether the following is true or false.
An optimisation that never helps any program is still worth including if it never hurts.
Answer: B
Every pass costs compilation time and adds code that can contain defects. A transformation must earn its place by improving some realistic class of programs. Optimisers accumulate passes easily and shed them only with difficulty.
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