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Embedded System Architecture Questions and Answers

Answer: C

Simplicity of decode is where the saving lies, and it shows up as both die area and switching energy. Code density is usually the CISC machine's advantage, which is why compressed instruction sets such as Thumb were introduced to claw some of it back.

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Answer: D

The processor core may be identical; what makes it a microcontroller is having flash, RAM, timers, converters and serial ports in the same package. That integration is what lets a product be built round a single device and a handful of passives.

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13.

Three of the following are normally integrated on a microcontroller. The exception is

Answer: A

Correct answer: a hard disk controller

A microcontroller integrates what an embedded application needs on one chip: flash, RAM, timers, converters, serial ports and general purpose I/O. A hard disk controller belongs to a class of system a microcontroller is not built for - embedded storage is flash or an SD card over SPI, and the mass-storage interface would dwarf the rest of the device.

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Answer: B

A general purpose kernel needs a memory management unit and tens of megabytes of RAM, which puts the design beyond any microcontroller. An FPGA with a soft core could be made to work but would cost far more in parts and effort for a standard requirement.

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15.

Which memory type retains its contents without power and can be erased electrically in blocks?

Answer: C

Block erasure is the distinguishing feature: byte-erasable non-volatile memory is EEPROM, and flash trades byte granularity for much higher density. It is why program memory is flash and small calibration stores are often EEPROM.

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Answer: D

A refresh controller and the special capacitor process DRAM needs are both unwelcome on a logic die. SRAM costs six transistors a bit against DRAM's one and a capacitor, so it is far less dense, which is why it is used in kilobytes and DRAM in megabytes.

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Answer: A

Reading a datasheet's memory map tells you where flash, RAM and each peripheral's registers appear, which is the first thing needed to write any driver. Two devices with the same core and different maps need different code.

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19.

A device has 20 address lines and an 8-bit data bus. Its directly addressable memory is

Answer: C

Correct answer: 1 MB

\[ 2^{20} = 1{,}048{,}576 \] addressable locations, each holding one byte on an 8-bit data bus, so 1 MB. The data bus width sets the size of each location, and the number of address lines sets how many there are - multiplying the two, as the 8 MB option does, confuses bits with bytes.

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Answer: D

Address lines fix the reach and data lines fix the throughput per access, and the two are independent: an 8-bit machine with twenty address lines reaches a megabyte one byte at a time. Confusing the two is the commonest slip in bus questions.

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