Embedded System Architecture Questions and Answers

Answer: C

Freeing the core from copying every byte is the point, and it matters most for a fast peripheral such as an ADC or an Ethernet MAC. The core sets up the transfer, the controller performs it and an interrupt announces completion.

Answer: D

Interleaving single transfers with processor accesses keeps the core's worst-case delay short at the cost of a lower transfer rate. Burst mode does the opposite, taking the bus for a whole block and stalling the core for its duration.

Answer: A

The controller very much uses the bus - that is how it reaches memory - and it contends with the core for it. What it saves is the core's *instruction* execution, not bus bandwidth, and confusing the two leads to badly wrong timing estimates.

Answer: B

Two million cycles a second are spent on interrupt overhead out of sixteen million available, which is an eighth. Moving the transfer to DMA reduces it to one interrupt per buffer and makes the load negligible, which is the usual reason for choosing DMA.

Answer: C

Healthy software clears the counter periodically; software that has hung or is looping cannot, the counter overflows and the reset restores the system to a known state. Refreshing it from a timer interrupt defeats the purpose, since the interrupt survives a hung main loop.

Answer: D

The watchdog then reports only that the timer interrupt is alive, which it will be almost whatever goes wrong in the application. The refresh should be conditional on every important task having reported progress since the last one.

Answer: A

Capturing the count at the instant of an edge measures the time between events with the resolution of the timer clock and no software latency at all. Compare mode is the complementary output function, and pulse counting is a third distinct mode.

Answer: B

The counter defines the period and the compare value defines the duty, so writing a new compare value changes the duty without disturbing the frequency. It is how a motor drive, a dimmer and a switching supply are all controlled from a microcontroller.

Answer: C

The tick is 64 over 8 MHz, that is 8 microseconds, and 65536 ticks is 0.524 seconds. Increasing the prescaler lengthens the period at the cost of resolution, and choosing between them is the standard timer design trade.

Answer: D

At 8 MHz one millisecond is eight thousand ticks, which fits comfortably in sixteen bits with no prescaling and therefore gives the finest resolution available. The same reasoning at 1 MHz would need a reload of a thousand.