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Combinational Logic Circuits Questions and Answers

11.

What is the expression for even parity for 3 bits a, b, c ?

Exam Year(s)

Tripura Public Service Commission - 2026,

Answer: A

The expression is \(a \oplus b \oplus c\).

XOR of several bits is 1 when an odd number of them are 1. The even-parity bit must be 1 exactly in those cases, so that data plus parity bit together contain an even number of 1s. So the even-parity generator is \(P = a \oplus b \oplus c\).

Check a = 1, b = 0, c = 0: one 1, so P must be 1 to make the count even, and \(1 \oplus 0 \oplus 0 = 1\). The complement \(\overline{a \oplus b \oplus c}\) is the odd-parity bit. AND and OR of the bits do not track the count of 1s at all.

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12.

What is the expression for sum of a full adder with 2 input bits a, b and carry bit c ?

Exam Year(s)

Tripura Public Service Commission - 2026,

Answer: A

The sum is \(a \oplus b \oplus c\).

A full adder adds three bits. The sum bit is 1 when an odd number of the inputs are 1 (one 1 gives sum 1, two give sum 0 with a carry, three give sum 1 with a carry), which is exactly the XOR of all three: \(S = a \oplus b \oplus c\). The carry is \(ab + bc + ca\).

\(\overline{a \oplus b \oplus c}\) is the complement, wrong in every row. \(a \wedge b \wedge c\) is 1 only when all three are 1, and \(a \vee b \vee c\) is 1 whenever any is 1, so neither is the sum.

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13.

Which of the following circuit come under the class of combinational logic circuits ?

I. Full Adder
II. Full Subtractor
III. Counter
IV. Multiplexer

Exam Year(s)

UGC NET - 2012,

Answer: B

A combinational circuit has outputs that depend only on the present inputs, with no memory. The full adder, the full subtractor and the multiplexer are all built from gates alone, and their outputs follow their inputs at once, so statements I, II and IV are correct. A counter is a sequential circuit, since it has flip-flops that remember its present state and the next state depends on the earlier count, so statement III is wrong. The options that include III are therefore wrong, and the option with only I and II leaves out the multiplexer. The answer is I, II and IV.

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