Sequential Circuit Design Questions and Answers

Answer: A

The matching is: a combinational logic with ROM (ii), b counters with DVM (iii), c LIFO with shift register (iv), d state diagram with sequential circuits (i), the code ii iii iv i (option A).

A ROM is a combinational circuit, a digital voltmeter works by counting pulses, a last-in first-out store is built from a shift register, and a state diagram describes a sequential circuit. Options B, C and D pair counters or LIFO with the wrong item.

Answer: A

The answer is both (A) and (R) are true and (R) is the correct explanation of (A).

In a Mealy machine the outputs depend on the present state and the present inputs. If an input changes in the middle of a clock period, the output can change at once and may pass through momentary false values (glitches) before settling, which is what R says.

That is precisely why A is required: to get clean synchronous behaviour, the inputs are synchronised with the clock and the outputs are read only at the clock edge, when they are guaranteed to be valid. A Moore machine avoids the problem because its outputs depend on the state alone.

Answer: B

The correct expressions are \(D_{1} = \bar{P}Q_{1} + \bar{P}Q_{0} + Q_{1}Q_{0}\) and \(D_{0} = \bar{P}\,\overline{Q_{0}} + \bar{P}Q_{1} + Q_{1}\overline{Q_{0}}\).

For a D flip-flop the input equals the next state, so \(D_{1} = Q_{1}^{+}\) and \(D_{0} = Q_{0}^{+}\). Read the minterms from the table, written as P Q₁ Q₀:

• \(Q_{1}^{+} = 1\) for 001, 010, 011 and 111. The three terms \(\bar{P}Q_{0}\) (001, 011), \(\bar{P}Q_{1}\) (010, 011) and \(Q_{1}Q_{0}\) (011, 111) cover exactly these.
• \(Q_{0}^{+} = 1\) for 000, 010, 011 and 110. The terms \(\bar{P}\,\overline{Q_{0}}\) (000, 010), \(\bar{P}Q_{1}\) (010, 011) and \(Q_{1}\overline{Q_{0}}\) (010, 110) cover exactly these.

The other options fail on a row: for example any \(D_{1}\) containing \(PQ_{1}\) gives 1 for input 110, where the table's next \(Q_{1}\) is 0, and \(D_{0} = PQ_{0} + \dots\) gives 1 for 101, where the next \(Q_{0}\) is 0.

Answer: A

Both statements are true. A sequential circuit changes state with a clock signal that times the changes, and its memory elements, such as flip-flops, store the state and are essential, since the output depends on past inputs as well as present ones. So the first option, i-True and ii-True, is correct and the other options each mark at least one true statement as false. Examples of memory elements in such circuits are latches and flip-flops, and examples of sequential circuits are counters and registers.

Answer: C

Asynchronous sequential circuits are difficult to design because they involve stability problem.

An asynchronous circuit has no clock: its state changes whenever an input changes, and feedback paths with unequal delays decide the next state. Two state variables changing together can race, the circuit can settle in the wrong state or oscillate between states, and hazards can produce false pulses. The designer must ensure the circuit always reaches a stable state, which requires race-free state assignment and careful analysis.

Needing an external clock is the mark of a synchronous circuit, not an asynchronous one. Memory is not the difficulty, and 'more complex' is vague; the stability problem is the specific reason.

Answer: C

Clock signals are used to synchronize events in various parts of a system.

In a synchronous sequential circuit every flip-flop changes state only at a clock edge. The clock therefore makes all state changes happen together at known instants, so that signals have time to settle between edges and the circuit behaves predictably despite gate delays.

The clock signal does not tell the time of day or measure time since power-on; real-time clocks are separate devices. Nor does it carry serial data, which travels on data lines, although a clock may time when each bit is sampled.

Answer: B

The correct matching is a-iii, b-iv, c-ii, d-i.

• A sequential logic circuit is a combinational circuit with storage elements in a feedback path, so its output depends on past inputs (iii).
• Combinational circuits include decoders and multiplexers, whose outputs depend only on present inputs (iv).
• Synchronous sequential logic changes state only at clock edges, so it depends on the clock signal (ii).
• Asynchronous logic circuits change state whenever inputs change, independent of a clock (i).

The codes that give 'depends on clock signal' to sequential circuits in general, or 'independent of clock' to synchronous logic, confuse the general class with its clocked and unclocked subtypes.

Answer: A

A state equation specifies the next state as a function of present state and inputs.

In a sequential circuit, a state equation (also called a transition or characteristic equation) gives the value each flip-flop will take after the next clock pulse in terms of the present state and the inputs, for example \(Q(t+1) = D\) for a D flip-flop or \(Q(t+1) = JQ' + K'Q\) for a JK flip-flop.

The clock only determines when the transition happens. Combinational circuits have no state, so a state equation cannot describe their behaviour, and the number of arithmetic operations has nothing to do with it.

Answer: C

The state diagram represents a serial parity checker.

The machine has two states. An input 0 leaves the state unchanged, and an input 1 toggles it, from 0 to 1 or from 1 to 0. After a stream of bits, the state therefore shows whether the number of 1s received so far is even (state 0) or odd (state 1), which is exactly the job of a serial parity checker.

A serial adder needs to keep a carry and takes two input bits at a time. A shift register and a counter have more states, and a counter advances on every clock regardless of whether the input is 0 or 1.

Answer: B

In a Moore machine the outputs are determined by the current state.

A Moore FSM attaches its outputs to the states themselves, so the output depends only on which state the machine is in. The inputs affect the output only indirectly, by deciding the next state at the clock edge. That makes Moore outputs change only after a clock edge and keeps them free of glitches from the inputs.

In a Mealy machine, by contrast, outputs depend on both the current state and the present inputs, which is why 'input values' describes Mealy rather than Moore. The clock only times the state changes, and 'output values' would be a circular answer.